rp2040_pac::dma::timer2

Struct TIMER2_SPEC

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pub struct TIMER2_SPEC;
Expand description

Pacing (X/Y) Fractional Timer
The pacing timer produces TREQ assertions at a rate set by ((X/Y) * sys_clk). This equation is evaluated every sys_clk cycles and therefore can only generate TREQs at a rate of 1 per sys_clk (i.e. permanent TREQ) or less.

You can read this register and get timer2::R. You can reset, write, write_with_zero this register using timer2::W. You can also modify this register. See API.

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impl RegisterSpec for TIMER2_SPEC

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type Ux = u32

Raw register type (u8, u16, u32, …).
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impl Resettable for TIMER2_SPEC

reset() method sets TIMER2 to value 0

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const RESET_VALUE: u32 = 0u32

Reset value of the register.
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fn reset_value() -> Self::Ux

Reset value of the register.
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impl Writable for TIMER2_SPEC

write(|w| ..) method takes timer2::W writer structure

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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1
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impl Readable for TIMER2_SPEC

read() method returns timer2::R reader structure

Auto Trait Implementations§

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