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81 lines
2.5 KiB
Rust
81 lines
2.5 KiB
Rust
//! examples/lockall_cost.rs
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#![deny(unsafe_code)]
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#![deny(warnings)]
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#![no_main]
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#![no_std]
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use panic_semihosting as _;
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#[rtic::app(device = lm3s6965)]
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mod app {
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#[shared]
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struct Shared {
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shared: u32,
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}
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#[local]
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struct Local {}
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#[init]
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fn init(_: init::Context) -> (Shared, Local, init::Monotonics) {
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(Shared { shared: 0 }, Local {}, init::Monotonics())
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}
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#[idle(shared = [shared])]
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#[inline(never)]
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fn idle(mut cx: idle::Context) -> ! {
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cx.shared.lock(|x| *x.shared += 1);
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loop {
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cortex_m::asm::nop();
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}
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}
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#[task(binds = UART0, shared = [shared])]
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fn uart0(mut cx: uart0::Context) {
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cx.shared.lock(|x| *x.shared += 1);
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}
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}
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// cargo objdump --example lockall_cost --target thumbv7m-none-eabi --release --features inline-asm -- --disassemble > lockall_cost.ojbdump
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//
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// The priority cell not optimized out?
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// 0000016c <lockall_cost::app::idle::he14f20fbca3d3928>:
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// 16c: 80 b5 push {r7, lr}
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// 16e: 6f 46 mov r7, sp
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// 170: 01 78 ldrb r1, [r0]
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// 172: 39 b1 cbz r1, 0x184 <lockall_cost::app::idle::he14f20fbca3d3928+0x18> @ imm = #14
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// 174: 40 f2 00 00 movw r0, #0
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// 178: c2 f2 00 00 movt r0, #8192
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// 17c: 01 68 ldr r1, [r0]
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// 17e: 01 31 adds r1, #1
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// 180: 01 60 str r1, [r0]
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// 182: 0f e0 b 0x1a4 <lockall_cost::app::idle::he14f20fbca3d3928+0x38> @ imm = #30
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// 184: 01 21 movs r1, #1
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// 186: 01 70 strb r1, [r0]
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// 188: e0 21 movs r1, #224
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// 18a: 81 f3 11 88 msr basepri, r1
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// 18e: 40 f2 00 01 movw r1, #0
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// 192: c2 f2 00 01 movt r1, #8192
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// 196: 0a 68 ldr r2, [r1]
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// 198: 01 32 adds r2, #1
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// 19a: 0a 60 str r2, [r1]
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// 19c: 00 21 movs r1, #0
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// 19e: 81 f3 11 88 msr basepri, r1
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// 1a2: 01 70 strb r1, [r0]
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// 1a4: 00 bf nop
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// 1a6: fd e7 b 0x1a4 <lockall_cost::app::idle::he14f20fbca3d3928+0x38> @ imm = #-6
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// The lock at highest prio is zero cost
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// 000001a8 <UART0>:
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// 1a8: 80 b5 push {r7, lr}
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// 1aa: 6f 46 mov r7, sp
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// 1ac: 40 f2 00 00 movw r0, #0
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// 1b0: c2 f2 00 00 movt r0, #8192
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// 1b4: 01 68 ldr r1, [r0]
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// 1b6: 01 31 adds r1, #1
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// 1b8: 01 60 str r1, [r0]
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// 1ba: 00 20 movs r0, #0
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// 1bc: 80 f3 11 88 msr basepri, r0
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// 1c0: 80 bd pop {r7, pc}
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