Expand description
Clock prescale register, SSPCPSR on page 3-8
Structs§
- Clock prescale register, SSPCPSR on page 3-8
Type Aliases§
- Field
CPSDVSR
reader - Clock prescale divisor. Must be an even number from 2-254, depending on the frequency of SSPCLK. The least significant bit always returns zero on reads. - Field
CPSDVSR
writer - Clock prescale divisor. Must be an even number from 2-254, depending on the frequency of SSPCLK. The least significant bit always returns zero on reads. - Register
SSPCPSR
reader - Register
SSPCPSR
writer