rp2040_pac::spi0

Module sspcpsr

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Expand description

Clock prescale register, SSPCPSR on page 3-8

Structs§

Type Aliases§

  • Field CPSDVSR reader - Clock prescale divisor. Must be an even number from 2-254, depending on the frequency of SSPCLK. The least significant bit always returns zero on reads.
  • Field CPSDVSR writer - Clock prescale divisor. Must be an even number from 2-254, depending on the frequency of SSPCLK. The least significant bit always returns zero on reads.
  • Register SSPCPSR reader
  • Register SSPCPSR writer