Expand description
System Control Register. Use the System Control Register for power-management functions: signal to the system when the processor can enter a low power state, control how the processor enters and exits low power states.
Structs§
- System Control Register. Use the System Control Register for power-management functions: signal to the system when the processor can enter a low power state, control how the processor enters and exits low power states.
Type Aliases§
- Register
SCR
reader - Field
SEVONPEND
reader - Send Event on Pending bit:
0 = Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded.
1 = Enabled events and all interrupts, including disabled interrupts, can wakeup the processor.
When an event or interrupt becomes pending, the event signal wakes up the processor from WFE. If the
processor is not waiting for an event, the event is registered and affects the next WFE.
The processor also wakes up on execution of an SEV instruction or an external event. - Field
SEVONPEND
writer - Send Event on Pending bit:
0 = Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded.
1 = Enabled events and all interrupts, including disabled interrupts, can wakeup the processor.
When an event or interrupt becomes pending, the event signal wakes up the processor from WFE. If the
processor is not waiting for an event, the event is registered and affects the next WFE.
The processor also wakes up on execution of an SEV instruction or an external event. - Field
SLEEPDEEP
reader - Controls whether the processor uses sleep or deep sleep as its low power mode:
0 = Sleep.
1 = Deep sleep. - Field
SLEEPDEEP
writer - Controls whether the processor uses sleep or deep sleep as its low power mode:
0 = Sleep.
1 = Deep sleep. - Field
SLEEPONEXIT
reader - Indicates sleep-on-exit when returning from Handler mode to Thread mode:
0 = Do not sleep when returning to Thread mode.
1 = Enter sleep, or deep sleep, on return from an ISR to Thread mode.
Setting this bit to 1 enables an interrupt driven application to avoid returning to an empty main application. - Field
SLEEPONEXIT
writer - Indicates sleep-on-exit when returning from Handler mode to Thread mode:
0 = Do not sleep when returning to Thread mode.
1 = Enter sleep, or deep sleep, on return from an ISR to Thread mode.
Setting this bit to 1 enables an interrupt driven application to avoid returning to an empty main application. - Register
SCR
writer