Module icsr

Use the Interrupt Control State Register to set a pending Non-Maskable Interrupt (NMI), set or clear a pending PendSV, set or clear a pending SysTick, check for pending exceptions, check the vector number of the highest priority pended exception, check the vector number of the active exception.

Structs

• ICSR_SPEC
  Use the Interrupt Control State Register to set a pending Non-Maskable Interrupt (NMI), set or clear a pending PendSV, set or clear a pending SysTick, check for pending exceptions, check the vector number of the highest priority pended exception, check the vector number of the active exception.

Type Aliases

• ISRPENDING_R
  Field ISRPENDING reader - External interrupt pending flag
• ISRPREEMPT_R
  Field ISRPREEMPT reader - The system can only access this bit when the core is halted. It indicates that a pending interrupt is to be taken in the next running cycle. If C_MASKINTS is clear in the Debug Halting Control and Status Register, the interrupt is serviced.
• NMIPENDSET_R
  Field NMIPENDSET reader - Setting this bit will activate an NMI. Since NMI is the highest priority exception, it will activate as soon as it is registered.
  NMI set-pending bit.
  Write:
  0 = No effect.
  1 = Changes NMI exception state to pending.
  Read:
  0 = NMI exception is not pending.
  1 = NMI exception is pending.
  Because NMI is the highest-priority exception, normally the processor enters the NMI
  exception handler as soon as it detects a write of 1 to this bit. Entering the handler then clears
  this bit to 0. This means a read of this bit by the NMI exception handler returns 1 only if the
  NMI signal is reasserted while the processor is executing that handler.
• NMIPENDSET_W
  Field NMIPENDSET writer - Setting this bit will activate an NMI. Since NMI is the highest priority exception, it will activate as soon as it is registered.
  NMI set-pending bit.
  Write:
  0 = No effect.
  1 = Changes NMI exception state to pending.
  Read:
  0 = NMI exception is not pending.
  1 = NMI exception is pending.
  Because NMI is the highest-priority exception, normally the processor enters the NMI
  exception handler as soon as it detects a write of 1 to this bit. Entering the handler then clears
  this bit to 0. This means a read of this bit by the NMI exception handler returns 1 only if the
  NMI signal is reasserted while the processor is executing that handler.
• PENDSTCLR_R
  Field PENDSTCLR reader - SysTick exception clear-pending bit.
  Write:
  0 = No effect.
  1 = Removes the pending state from the SysTick exception.
  This bit is WO. On a register read its value is Unknown.
• PENDSTCLR_W
  Field PENDSTCLR writer - SysTick exception clear-pending bit.
  Write:
  0 = No effect.
  1 = Removes the pending state from the SysTick exception.
  This bit is WO. On a register read its value is Unknown.
• PENDSTSET_R
  Field PENDSTSET reader - SysTick exception set-pending bit.
  Write:
  0 = No effect.
  1 = Changes SysTick exception state to pending.
  Read:
  0 = SysTick exception is not pending.
  1 = SysTick exception is pending.
• PENDSTSET_W
  Field PENDSTSET writer - SysTick exception set-pending bit.
  Write:
  0 = No effect.
  1 = Changes SysTick exception state to pending.
  Read:
  0 = SysTick exception is not pending.
  1 = SysTick exception is pending.
• PENDSVCLR_R
  Field PENDSVCLR reader - PendSV clear-pending bit.
  Write:
  0 = No effect.
  1 = Removes the pending state from the PendSV exception.
• PENDSVCLR_W
  Field PENDSVCLR writer - PendSV clear-pending bit.
  Write:
  0 = No effect.
  1 = Removes the pending state from the PendSV exception.
• PENDSVSET_R
  Field PENDSVSET reader - PendSV set-pending bit.
  Write:
  0 = No effect.
  1 = Changes PendSV exception state to pending.
  Read:
  0 = PendSV exception is not pending.
  1 = PendSV exception is pending.
  Writing 1 to this bit is the only way to set the PendSV exception state to pending.
• PENDSVSET_W
  Field PENDSVSET writer - PendSV set-pending bit.
  Write:
  0 = No effect.
  1 = Changes PendSV exception state to pending.
  Read:
  0 = PendSV exception is not pending.
  1 = PendSV exception is pending.
  Writing 1 to this bit is the only way to set the PendSV exception state to pending.
• R
  Register ICSR reader
• VECTACTIVE_R
  Field VECTACTIVE reader - Active exception number field. Reset clears the VECTACTIVE field.
• VECTPENDING_R
  Field VECTPENDING reader - Indicates the exception number for the highest priority pending exception: 0 = no pending exceptions. Non zero = The pending state includes the effect of memory-mapped enable and mask registers. It does not include the PRIMASK special-purpose register qualifier.
• W
  Register ICSR writer