Module iftiming

SPI interface timing.

Structs

• IFTIMING_SPEC
  SPI interface timing.
• R
  Register IFTIMING reader
• W
  Register IFTIMING writer

Type Aliases

• RXDELAY_R
  Field RXDELAY reader - Timing related to sampling of the input serial data. The value of RXDELAY specifies the number of 64 MHz cycles (15.625 ns) delay from the the rising edge of the SPI Clock (SCK) until the input serial data is sampled. As en example, if set to 0 the input serial data is sampled on the rising edge of SCK.
• RXDELAY_W
  Field RXDELAY writer - Timing related to sampling of the input serial data. The value of RXDELAY specifies the number of 64 MHz cycles (15.625 ns) delay from the the rising edge of the SPI Clock (SCK) until the input serial data is sampled. As en example, if set to 0 the input serial data is sampled on the rising edge of SCK.