mirror of
https://github.com/rtic-rs/rtic.git
synced 2024-11-23 20:22:51 +01:00
soundness and cost
This commit is contained in:
parent
e0c683b671
commit
6c3d94d73b
2 changed files with 59 additions and 89 deletions
|
@ -22,58 +22,44 @@ mod app {
|
|||
(Shared { shared: 0 }, Local {}, init::Monotonics())
|
||||
}
|
||||
|
||||
#[idle(shared = [shared])]
|
||||
#[inline(never)]
|
||||
fn idle(mut cx: idle::Context) -> ! {
|
||||
#[task(binds = GPIOA, shared = [shared])]
|
||||
fn low(mut cx: low::Context) {
|
||||
cx.shared.shared.lock(|shared| *shared += 1);
|
||||
|
||||
loop {
|
||||
cortex_m::asm::nop();
|
||||
}
|
||||
}
|
||||
|
||||
#[task(binds = UART0, shared = [shared])]
|
||||
fn uart0(mut cx: uart0::Context) {
|
||||
#[task(binds = GPIOB, priority = 2, shared = [shared])]
|
||||
fn high(mut cx: high::Context) {
|
||||
cx.shared.shared.lock(|shared| *shared += 1);
|
||||
}
|
||||
}
|
||||
|
||||
// cargo objdump --example lock_cost --target thumbv7m-none-eabi --release --features inline-asm -- --disassemble > lock_cost.objdump
|
||||
|
||||
// 0000016c <lock_cost::app::idle::he8e6b27e7333515d>:
|
||||
//
|
||||
// Zero-Cost implementations:
|
||||
// 0000016c <GPIOA>:
|
||||
// 16c: 80 b5 push {r7, lr}
|
||||
// 16e: 6f 46 mov r7, sp
|
||||
// 170: 01 78 ldrb r1, [r0]
|
||||
// 172: 39 b1 cbz r1, 0x184 <lock_cost::app::idle::he8e6b27e7333515d+0x18> @ imm = #14
|
||||
// 174: 40 f2 00 00 movw r0, #0
|
||||
// 178: c2 f2 00 00 movt r0, #8192
|
||||
// 17c: 01 68 ldr r1, [r0]
|
||||
// 17e: 01 31 adds r1, #1
|
||||
// 180: 01 60 str r1, [r0]
|
||||
// 182: 0f e0 b 0x1a4 <lock_cost::app::idle::he8e6b27e7333515d+0x38> @ imm = #30
|
||||
// 184: 01 21 movs r1, #1
|
||||
// 186: 01 70 strb r1, [r0]
|
||||
// 188: e0 21 movs r1, #224
|
||||
// 18a: 81 f3 11 88 msr basepri, r1
|
||||
// 18e: 40 f2 00 01 movw r1, #0
|
||||
// 192: c2 f2 00 01 movt r1, #8192
|
||||
// 196: 0a 68 ldr r2, [r1]
|
||||
// 198: 01 32 adds r2, #1
|
||||
// 19a: 0a 60 str r2, [r1]
|
||||
// 19c: 00 21 movs r1, #0
|
||||
// 19e: 81 f3 11 88 msr basepri, r1
|
||||
// 1a2: 01 70 strb r1, [r0]
|
||||
// 1a4: 00 bf nop
|
||||
// 1a6: fd e7 b 0x1a4 <lock_cost::app::idle::he8e6b27e7333515d+0x38> @ imm = #-6
|
||||
// 170: c0 20 movs r0, #192
|
||||
// 172: 80 f3 11 88 msr basepri, r0
|
||||
// 176: 40 f2 00 00 movw r0, #0
|
||||
// 17a: c2 f2 00 00 movt r0, #8192
|
||||
// 17e: 01 68 ldr r1, [r0]
|
||||
// 180: 01 31 adds r1, #1
|
||||
// 182: 01 60 str r1, [r0]
|
||||
// 184: e0 20 movs r0, #224
|
||||
// 186: 80 f3 11 88 msr basepri, r0
|
||||
// 18a: 00 20 movs r0, #0
|
||||
// 18c: 80 f3 11 88 msr basepri, r0
|
||||
// 190: 80 bd pop {r7, pc}
|
||||
|
||||
// 000001a8 <UART0>:
|
||||
// 1a8: 80 b5 push {r7, lr}
|
||||
// 1aa: 6f 46 mov r7, sp
|
||||
// 1ac: 40 f2 00 00 movw r0, #0
|
||||
// 1b0: c2 f2 00 00 movt r0, #8192
|
||||
// 1b4: 01 68 ldr r1, [r0]
|
||||
// 1b6: 01 31 adds r1, #1
|
||||
// 1b8: 01 60 str r1, [r0]
|
||||
// 1ba: 00 20 movs r0, #0
|
||||
// 1bc: 80 f3 11 88 msr basepri, r0
|
||||
// 1c0: 80 bd pop {r7, pc}
|
||||
// 00000192 <GPIOB>:
|
||||
// 192: 80 b5 push {r7, lr}
|
||||
// 194: 6f 46 mov r7, sp
|
||||
// 196: 40 f2 00 01 movw r1, #0
|
||||
// 19a: ef f3 11 80 mrs r0, basepri
|
||||
// 19e: c2 f2 00 01 movt r1, #8192
|
||||
// 1a2: 0a 68 ldr r2, [r1]
|
||||
// 1a4: 01 32 adds r2, #1
|
||||
// 1a6: 0a 60 str r2, [r1]
|
||||
// 1a8: 80 f3 11 88 msr basepri, r0
|
||||
// 1ac: 80 bd pop {r7, pc}
|
||||
|
|
|
@ -22,60 +22,44 @@ mod app {
|
|||
(Shared { shared: 0 }, Local {}, init::Monotonics())
|
||||
}
|
||||
|
||||
#[idle(shared = [shared])]
|
||||
#[inline(never)]
|
||||
fn idle(mut cx: idle::Context) -> ! {
|
||||
#[task(binds = GPIOA, shared = [shared])]
|
||||
fn low(mut cx: low::Context) {
|
||||
cx.shared.lock(|x| *x.shared += 1);
|
||||
|
||||
loop {
|
||||
cortex_m::asm::nop();
|
||||
}
|
||||
}
|
||||
|
||||
#[task(binds = UART0, shared = [shared])]
|
||||
fn uart0(mut cx: uart0::Context) {
|
||||
#[task(binds = GPIOB, priority = 2, shared = [shared])]
|
||||
fn high(mut cx: high::Context) {
|
||||
cx.shared.lock(|x| *x.shared += 1);
|
||||
}
|
||||
}
|
||||
|
||||
// cargo objdump --example lockall_cost --target thumbv7m-none-eabi --release --features inline-asm -- --disassemble > lockall_cost.ojbdump
|
||||
//
|
||||
// The priority cell not optimized out?
|
||||
// 0000016c <lockall_cost::app::idle::he14f20fbca3d3928>:
|
||||
// Zero-Cost implementations:
|
||||
// 0000016c <GPIOA>:
|
||||
// 16c: 80 b5 push {r7, lr}
|
||||
// 16e: 6f 46 mov r7, sp
|
||||
// 170: 01 78 ldrb r1, [r0]
|
||||
// 172: 39 b1 cbz r1, 0x184 <lockall_cost::app::idle::he14f20fbca3d3928+0x18> @ imm = #14
|
||||
// 174: 40 f2 00 00 movw r0, #0
|
||||
// 178: c2 f2 00 00 movt r0, #8192
|
||||
// 17c: 01 68 ldr r1, [r0]
|
||||
// 17e: 01 31 adds r1, #1
|
||||
// 180: 01 60 str r1, [r0]
|
||||
// 182: 0f e0 b 0x1a4 <lockall_cost::app::idle::he14f20fbca3d3928+0x38> @ imm = #30
|
||||
// 184: 01 21 movs r1, #1
|
||||
// 186: 01 70 strb r1, [r0]
|
||||
// 188: e0 21 movs r1, #224
|
||||
// 18a: 81 f3 11 88 msr basepri, r1
|
||||
// 18e: 40 f2 00 01 movw r1, #0
|
||||
// 192: c2 f2 00 01 movt r1, #8192
|
||||
// 196: 0a 68 ldr r2, [r1]
|
||||
// 198: 01 32 adds r2, #1
|
||||
// 19a: 0a 60 str r2, [r1]
|
||||
// 19c: 00 21 movs r1, #0
|
||||
// 19e: 81 f3 11 88 msr basepri, r1
|
||||
// 1a2: 01 70 strb r1, [r0]
|
||||
// 1a4: 00 bf nop
|
||||
// 1a6: fd e7 b 0x1a4 <lockall_cost::app::idle::he14f20fbca3d3928+0x38> @ imm = #-6
|
||||
// 170: c0 20 movs r0, #192
|
||||
// 172: 80 f3 11 88 msr basepri, r0
|
||||
// 176: 40 f2 00 00 movw r0, #0
|
||||
// 17a: c2 f2 00 00 movt r0, #8192
|
||||
// 17e: 01 68 ldr r1, [r0]
|
||||
// 180: 01 31 adds r1, #1
|
||||
// 182: 01 60 str r1, [r0]
|
||||
// 184: e0 20 movs r0, #224
|
||||
// 186: 80 f3 11 88 msr basepri, r0
|
||||
// 18a: 00 20 movs r0, #0
|
||||
// 18c: 80 f3 11 88 msr basepri, r0
|
||||
// 190: 80 bd pop {r7, pc}
|
||||
|
||||
// The lock at highest prio is zero cost
|
||||
// 000001a8 <UART0>:
|
||||
// 1a8: 80 b5 push {r7, lr}
|
||||
// 1aa: 6f 46 mov r7, sp
|
||||
// 1ac: 40 f2 00 00 movw r0, #0
|
||||
// 1b0: c2 f2 00 00 movt r0, #8192
|
||||
// 1b4: 01 68 ldr r1, [r0]
|
||||
// 1b6: 01 31 adds r1, #1
|
||||
// 1b8: 01 60 str r1, [r0]
|
||||
// 1ba: 00 20 movs r0, #0
|
||||
// 1bc: 80 f3 11 88 msr basepri, r0
|
||||
// 1c0: 80 bd pop {r7, pc}
|
||||
// 00000192 <GPIOB>:
|
||||
// 192: 80 b5 push {r7, lr}
|
||||
// 194: 6f 46 mov r7, sp
|
||||
// 196: 40 f2 00 01 movw r1, #0
|
||||
// 19a: ef f3 11 80 mrs r0, basepri
|
||||
// 19e: c2 f2 00 01 movt r1, #8192
|
||||
// 1a2: 0a 68 ldr r2, [r1]
|
||||
// 1a4: 01 32 adds r2, #1
|
||||
// 1a6: 0a 60 str r2, [r1]
|
||||
// 1a8: 80 f3 11 88 msr basepri, r0
|
||||
// 1ac: 80 bd pop {r7, pc}
|
||||
|
|
Loading…
Reference in a new issue