mirror of
https://github.com/rtic-rs/rtic.git
synced 2025-12-16 12:55:23 +01:00
Prepare for new riscv ecosystem
This commit is contained in:
Román Cárdenas Rodríguez
Henrik Tjäder
parent
bac77de9bc
commit
183e73904a
14 changed files with 164 additions and 134 deletions
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@ -3,9 +3,9 @@ runner = "qemu-system-riscv32 -machine sifive_e,revb=true -nographic -semihostin
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# runner = "riscv64-unknown-elf-gdb -q -x gdb_init"
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rustflags = [
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"-C", "link-arg=-Thifive1-link.x",
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"--cfg", "portable_atomic_target_feature=\"zaamo\"",
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]
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[build]
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# Pick ONE of these compilation targets
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# target = "riscv32imc-unknown-none-elf" # non-atomic support
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target = "riscv32imac-unknown-none-elf" # atomic support (partial)
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target = "riscv32imc-unknown-none-elf"
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178
examples/hifive1/Cargo.lock
generated
178
examples/hifive1/Cargo.lock
generated
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@ -16,59 +16,51 @@ checksum = "1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b"
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[[package]]
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name = "critical-section"
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version = "1.1.2"
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version = "1.2.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "7059fff8937831a9ae6f0fe4d658ffabf58f2ca96aa9dec1c889f936f705f216"
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checksum = "790eea4361631c5e7d22598ecd5723ff611904e3344ce8720784c93e3d83d40b"
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[[package]]
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name = "e310x"
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version = "0.11.0"
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source = "git+https://github.com/greenlsi/e310x.git?branch=master#50536cc5be2fd6adf7f879f002fdd98f66fb05f9"
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version = "0.12.0"
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source = "git+https://github.com/riscv-rust/e310x.git?branch=ehv1#ddc85fd4a8138c24d8080810469fb354ccb46d2d"
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dependencies = [
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"critical-section",
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"riscv-pac",
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"riscv-peripheral",
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"vcell",
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]
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[[package]]
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name = "e310x"
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version = "0.11.0"
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source = "git+https://github.com/greenlsi/e310x.git#50536cc5be2fd6adf7f879f002fdd98f66fb05f9"
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dependencies = [
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"riscv-pac",
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"riscv",
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"riscv-peripheral",
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"riscv-rt",
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"vcell",
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]
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[[package]]
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name = "e310x-hal"
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version = "0.11.0"
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source = "git+https://github.com/greenlsi/e310x-hal.git?branch=master#931aea7ab142c1eb9eaadd4150946d8452229f27"
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version = "0.12.0"
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source = "git+https://github.com/riscv-rust/e310x.git?branch=ehv1#ddc85fd4a8138c24d8080810469fb354ccb46d2d"
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dependencies = [
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"e310x 0.11.0 (git+https://github.com/greenlsi/e310x.git?branch=master)",
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"embedded-hal 0.2.7",
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"nb 1.1.0",
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"e310x",
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"embedded-hal",
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"embedded-hal-nb",
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"nb",
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"portable-atomic",
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"riscv",
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]
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[[package]]
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name = "embedded-hal"
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version = "0.2.7"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "35949884794ad573cf46071e41c9b60efb0cb311e3ca01f7af807af1debc66ff"
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dependencies = [
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"nb 0.1.3",
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"void",
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]
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[[package]]
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name = "embedded-hal"
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version = "1.0.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "361a90feb7004eca4019fb28352a9465666b24f840f5c3cddf0ff13920590b89"
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[[package]]
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name = "embedded-hal-nb"
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version = "1.0.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "fba4268c14288c828995299e59b12babdbe170f6c6d73731af1b4648142e8605"
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dependencies = [
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"embedded-hal",
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"nb",
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]
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[[package]]
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name = "equivalent"
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version = "1.0.1"
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@ -97,17 +89,18 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "0bfb9eb618601c89945a70e254898da93b13be0388091d42117462b265bb3fad"
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dependencies = [
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"hash32",
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"portable-atomic",
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"stable_deref_trait",
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]
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[[package]]
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name = "hifive1"
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version = "0.11.0"
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source = "git+https://github.com/romancardenas/hifive1.git#ef8cea8b90bddb04509785d3e148ff145137520a"
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version = "0.14.0"
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source = "git+https://github.com/riscv-rust/e310x.git?branch=ehv1#ddc85fd4a8138c24d8080810469fb354ccb46d2d"
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dependencies = [
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"critical-section",
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"e310x-hal",
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"embedded-hal 0.2.7",
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"nb 1.1.0",
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"nb",
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"riscv",
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]
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@ -121,15 +114,6 @@ dependencies = [
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"hashbrown",
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]
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[[package]]
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name = "nb"
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version = "0.1.3"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "801d31da0513b6ec5214e9bf433a77966320625a37860f910be265be6e18d06f"
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dependencies = [
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"nb 1.1.0",
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]
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[[package]]
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name = "nb"
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version = "1.1.0"
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@ -137,33 +121,37 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "8d5439c4ad607c3c23abf66de8c8bf57ba8adcd1f129e699851a6e43935d339d"
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[[package]]
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name = "portable-atomic"
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version = "1.6.0"
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name = "paste"
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version = "1.0.15"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "7170ef9988bc169ba16dd36a7fa041e5c4cbeb6a35b76d4c03daded371eae7c0"
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checksum = "57c0d7b74b563b49d38dae00a0c37d4d6de9b432382b2892f0574ddcae73fd0a"
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[[package]]
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name = "proc-macro-error"
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version = "1.0.4"
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name = "portable-atomic"
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version = "1.9.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "da25490ff9892aab3fcf7c36f08cfb902dd3e71ca0f9f9517bea02a73a5ce38c"
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checksum = "cc9c68a3f6da06753e9335d63e27f6b9754dd1920d941135b7ea8224f141adb2"
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[[package]]
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name = "proc-macro-error-attr2"
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version = "2.0.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "96de42df36bb9bba5542fe9f1a054b8cc87e172759a1868aa05c1f3acc89dfc5"
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dependencies = [
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"proc-macro-error-attr",
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"proc-macro2",
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"quote",
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"syn 1.0.109",
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"version_check",
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]
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[[package]]
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name = "proc-macro-error-attr"
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version = "1.0.4"
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name = "proc-macro-error2"
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version = "2.0.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "a1be40180e52ecc98ad80b184934baf3d0d29f979574e439af5a55274b35f869"
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checksum = "11ec05c52be0a07b08061f7dd003e7d7092e0472bc731b4af7bb1ef876109802"
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dependencies = [
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"proc-macro-error-attr2",
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"proc-macro2",
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"quote",
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"version_check",
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"syn",
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]
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[[package]]
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@ -186,57 +174,71 @@ dependencies = [
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[[package]]
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name = "riscv"
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version = "0.11.1"
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version = "0.12.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "2f5c1b8bf41ea746266cdee443d1d1e9125c86ce1447e1a2615abd34330d33a9"
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checksum = "5ea8ff73d3720bdd0a97925f0bf79ad2744b6da8ff36be3840c48ac81191d7a7"
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dependencies = [
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"critical-section",
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"embedded-hal 1.0.0",
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"embedded-hal",
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"paste",
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"riscv-macros",
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"riscv-pac",
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]
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[[package]]
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name = "riscv-macros"
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version = "0.1.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "f265be5d634272320a7de94cea15c22a3bfdd4eb42eb43edc528415f066a1f25"
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dependencies = [
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"proc-macro2",
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"quote",
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"syn",
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]
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[[package]]
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name = "riscv-pac"
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version = "0.1.1"
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version = "0.2.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "18ceb4af23fdad434f938afdc35ce895a63d84f7333bb127d8065030848eb6a6"
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checksum = "8188909339ccc0c68cfb5a04648313f09621e8b87dc03095454f1a11f6c5d436"
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[[package]]
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name = "riscv-peripheral"
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version = "0.1.0"
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version = "0.2.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "07c799fe4e144bd4dd0c68fa33a41c1485f19730eea505d195124636e1253358"
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checksum = "62858721c9afcfff0fe501db36f543c6498b64d3630446166b270625f09c3eec"
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dependencies = [
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"embedded-hal 1.0.0",
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"embedded-hal",
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"riscv",
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"riscv-pac",
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]
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[[package]]
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name = "riscv-rt"
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version = "0.12.2"
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version = "0.13.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "c0d35e32cf1383183e8885d8a9aa4402a087fd094dc34c2cb6df6687d0229dfe"
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checksum = "753f1bd7eb4e0003cec5e2fb60ea8e253a71d0b041bc7d1ba0fffe22e3c0294d"
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dependencies = [
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"riscv",
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"riscv-pac",
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"riscv-rt-macros",
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]
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[[package]]
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name = "riscv-rt-macros"
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version = "0.2.1"
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version = "0.2.2"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "a8d100d466dbb76681ef6a9386f3da9abc570d57394e86da0ba5af8c4408486d"
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checksum = "30f19a85fe107b65031e0ba8ec60c34c2494069fe910d6c297f5e7cb5a6f76d0"
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dependencies = [
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"proc-macro2",
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"quote",
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"syn 1.0.109",
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"syn",
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]
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[[package]]
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name = "riscv-slic"
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version = "0.1.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "c6e12f8155a8ba8ed8dae9d68c36becb651308416592e7b45a4769d5d545385b"
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source = "git+https://github.com/romancardenas/riscv-slic.git?branch=mecall#a4800b26bfa8c1e46567703bed3154b137032023"
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dependencies = [
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"critical-section",
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"heapless",
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@ -247,12 +249,11 @@ dependencies = [
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[[package]]
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name = "riscv-slic-macros"
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version = "0.1.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "d246759b5f1486fffb3153b5d74c964a53e88d2176dbc57c3c00aba5587a81a6"
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source = "git+https://github.com/romancardenas/riscv-slic.git?branch=mecall#a4800b26bfa8c1e46567703bed3154b137032023"
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dependencies = [
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"proc-macro2",
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"quote",
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"syn 2.0.49",
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"syn",
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]
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[[package]]
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@ -279,19 +280,19 @@ name = "rtic-macros"
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version = "2.1.0"
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dependencies = [
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"indexmap",
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"proc-macro-error",
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"proc-macro-error2",
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"proc-macro2",
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"quote",
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"syn 2.0.49",
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"syn",
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]
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[[package]]
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name = "rtic_hifive1"
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version = "0.1.0"
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dependencies = [
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"e310x 0.11.0 (git+https://github.com/greenlsi/e310x.git)",
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"heapless",
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"hifive1",
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"portable-atomic",
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"riscv",
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"riscv-rt",
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"rtic",
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@ -310,17 +311,6 @@ version = "1.2.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "a8f112729512f8e442d81f95a8a7ddf2b7c6b8a1a6f509a95864142b30cab2d3"
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[[package]]
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name = "syn"
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version = "1.0.109"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "72b64191b275b66ffe2469e8af2c1cfe3bafa67b529ead792a6d0160888b4237"
|
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dependencies = [
|
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"proc-macro2",
|
||||
"quote",
|
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"unicode-ident",
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]
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[[package]]
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name = "syn"
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version = "2.0.49"
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@ -343,15 +333,3 @@ name = "vcell"
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version = "0.1.3"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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||||
checksum = "77439c1b53d2303b20d9459b1ade71a83c716e3f9c34f3228c00e6f185d6c002"
|
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|
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[[package]]
|
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name = "version_check"
|
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version = "0.9.4"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f"
|
||||
|
||||
[[package]]
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name = "void"
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||||
version = "1.0.2"
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||||
source = "registry+https://github.com/rust-lang/crates.io-index"
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||||
checksum = "6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d"
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|
|
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@ -10,13 +10,14 @@ edition = "2021"
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[dependencies]
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rtic = { path = "../../rtic" }
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heapless = "0.8.0"
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hifive1 = { git = "https://github.com/romancardenas/hifive1.git", features = ["board-redv"] }
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e310x = { git = "https://github.com/greenlsi/e310x.git", features = ["rt"]}
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riscv-rt = {version = "0.12.1", features = ["single-hart"]}
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riscv = "0.11.0"
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heapless = { version = "0.8.0", features = ["portable-atomic-unsafe-assume-single-core"] }
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hifive1 = { git = "https://github.com/riscv-rust/e310x.git", branch = "ehv1", features = ["board-redv"] }
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riscv-rt = {version = "0.13.0", features = ["single-hart"]}
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riscv = "0.12.1"
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semihosting = { version = "0.1", features = ["stdio", "panic-handler"] }
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portable-atomic = { version = "1.9", features = ["unsafe-assume-single-core", "force-amo"] }
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[features]
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riscv-clint-backend = ["rtic/riscv-clint-backend"]
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riscv-mecall-backend = ["rtic/riscv-mecall-backend"]
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test-critical-section = []
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|
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@ -1,10 +1,13 @@
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#![no_main]
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#![no_std]
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use hifive1::hal::e310x;
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use riscv_rt as _;
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|
||||
#[rtic::app(device = e310x, backend = HART0)]
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||||
#[cfg_attr(feature = "riscv-mecall-backend", rtic::app(device = e310x))]
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#[cfg_attr(feature = "riscv-clint-backend", rtic::app(device = e310x, backend = H0))]
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mod app {
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use super::e310x;
|
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use core::{future::Future, pin::Pin, task::Context, task::Poll};
|
||||
use hifive1::hal::prelude::*;
|
||||
use semihosting::{println, process::exit};
|
||||
|
|
|
|||
|
|
@ -5,13 +5,15 @@
|
|||
#![deny(unsafe_code)]
|
||||
#![deny(missing_docs)]
|
||||
|
||||
use hifive1 as _;
|
||||
use hifive1::hal::e310x;
|
||||
use riscv_rt as _;
|
||||
|
||||
#[rtic::app(device = e310x, backend = HART0)]
|
||||
#[cfg_attr(feature = "riscv-mecall-backend", rtic::app(device = e310x))]
|
||||
#[cfg_attr(feature = "riscv-clint-backend", rtic::app(device = e310x, backend = H0))]
|
||||
mod app {
|
||||
use semihosting::{process::exit, println};
|
||||
use super::e310x;
|
||||
use heapless::spsc::{Consumer, Producer, Queue};
|
||||
use semihosting::{println, process::exit};
|
||||
|
||||
#[shared]
|
||||
struct Shared {}
|
||||
|
|
|
|||
|
|
@ -5,11 +5,13 @@
|
|||
#![deny(unsafe_code)]
|
||||
#![deny(missing_docs)]
|
||||
|
||||
use hifive1 as _;
|
||||
use hifive1::hal::e310x;
|
||||
use riscv_rt as _;
|
||||
|
||||
#[rtic::app(device = e310x, backend = HART0)]
|
||||
#[cfg_attr(feature = "riscv-mecall-backend", rtic::app(device = e310x))]
|
||||
#[cfg_attr(feature = "riscv-clint-backend", rtic::app(device = e310x, backend = H0))]
|
||||
mod app {
|
||||
use super::e310x;
|
||||
use semihosting::{println, process::exit};
|
||||
|
||||
#[shared]
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
#![deny(missing_docs)]
|
||||
|
||||
use core::marker::PhantomData;
|
||||
use hifive1 as _;
|
||||
use hifive1::hal::e310x;
|
||||
use riscv_rt as _;
|
||||
|
||||
/// Does not impl send
|
||||
|
|
@ -14,8 +14,10 @@ pub struct NotSend {
|
|||
_0: PhantomData<*const ()>,
|
||||
}
|
||||
|
||||
#[rtic::app(device = e310x, backend = HART0)]
|
||||
#[cfg_attr(feature = "riscv-mecall-backend", rtic::app(device = e310x))]
|
||||
#[cfg_attr(feature = "riscv-clint-backend", rtic::app(device = e310x, backend = H0))]
|
||||
mod app {
|
||||
use super::e310x;
|
||||
use super::NotSend;
|
||||
use core::marker::PhantomData;
|
||||
use semihosting::{println, process::exit};
|
||||
|
|
|
|||
|
|
@ -40,6 +40,8 @@ riscv-esp32c3 = []
|
|||
# riscv-clic = []
|
||||
# riscv-ch32 = []
|
||||
riscv-slic = []
|
||||
riscv-clint = ["riscv-slic"]
|
||||
riscv-mecall= ["riscv-slic"]
|
||||
|
||||
# backend API test
|
||||
test-template = []
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ use syn::{parse, Attribute, Ident};
|
|||
/// Utility function to get the SLIC interrupt module.
|
||||
pub fn interrupt_ident() -> Ident {
|
||||
let span = Span::call_site();
|
||||
Ident::new("Interrupt", span)
|
||||
Ident::new("SoftwareInterrupt", span)
|
||||
}
|
||||
|
||||
pub fn interrupt_mod(_app: &App) -> TokenStream2 {
|
||||
|
|
@ -119,7 +119,7 @@ pub fn pre_init_enable_interrupts(app: &App, analysis: &CodegenAnalysis) -> Vec<
|
|||
.map(|task| (&task.args.priority, &task.args.binds)),
|
||||
) {
|
||||
stmts.push(quote!(
|
||||
rtic::export::set_priority(slic::Interrupt::#name, #p);
|
||||
rtic::export::set_priority(slic::SoftwareInterrupt::#name, #p);
|
||||
));
|
||||
}
|
||||
// Finally, we activate the interrupts
|
||||
|
|
@ -153,11 +153,11 @@ pub fn architecture_specific_analysis(app: &App, _analysis: &SyntaxAnalysis) ->
|
|||
|
||||
return Err(parse::Error::new(first.unwrap().span(), s));
|
||||
}
|
||||
|
||||
#[cfg(feature = "riscv-clint")]
|
||||
if app.args.backend.is_none() {
|
||||
return Err(parse::Error::new(
|
||||
Span::call_site(),
|
||||
"SLIC requires backend-specific configuration",
|
||||
"CLINT requires backend-specific configuration",
|
||||
));
|
||||
}
|
||||
|
||||
|
|
@ -247,9 +247,19 @@ pub fn extra_modules(app: &App, _analysis: &SyntaxAnalysis) -> Vec<TokenStream2>
|
|||
stmts.push(quote!(
|
||||
use rtic::export::riscv_slic;
|
||||
));
|
||||
let hart_id = &app.args.backend.as_ref().unwrap().hart_id;
|
||||
let slic = quote! {rtic::export::riscv_slic};
|
||||
|
||||
stmts.push(quote!(rtic::export::codegen!(pac = #device, swi = [#(#swi_slice,)*], backend = [hart_id = #hart_id]);));
|
||||
match () {
|
||||
#[cfg(feature = "riscv-clint")]
|
||||
() => {
|
||||
let hart_id = &app.args.backend.as_ref().unwrap().hart_id;
|
||||
stmts.push(quote!(rtic::export::codegen!(slic = #slic, pac = #device, swi = [#(#swi_slice,)*], backend = [hart_id = #hart_id]);));
|
||||
}
|
||||
#[cfg(feature = "riscv-mecall")]
|
||||
() => {
|
||||
stmts.push(quote!(rtic::export::codegen!(slic = #slic, pac = #device, swi = [#(#swi_slice,)*]);));
|
||||
}
|
||||
}
|
||||
|
||||
stmts
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,16 +1,27 @@
|
|||
use syn::{
|
||||
parse::{Parse, ParseStream},
|
||||
Ident, Result,
|
||||
Result,
|
||||
};
|
||||
|
||||
#[derive(Debug)]
|
||||
pub struct BackendArgs {
|
||||
pub hart_id: Ident,
|
||||
#[cfg(feature = "riscv-clint")]
|
||||
pub hart_id: syn::Ident,
|
||||
}
|
||||
|
||||
impl Parse for BackendArgs {
|
||||
fn parse(input: ParseStream) -> Result<Self> {
|
||||
let hart_id = input.parse()?;
|
||||
Ok(BackendArgs { hart_id })
|
||||
match () {
|
||||
#[cfg(feature = "riscv-clint")]
|
||||
() => {
|
||||
let hart_id = input.parse()?;
|
||||
Ok(BackendArgs { hart_id })
|
||||
}
|
||||
#[cfg(feature = "riscv-mecall")]
|
||||
() => Err(syn::Error::new(
|
||||
input.span(),
|
||||
"riscv-mecall backend does not accept any arguments",
|
||||
)),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@ features = ["thumbv7-backend"]
|
|||
name = "rtic"
|
||||
|
||||
[dependencies]
|
||||
riscv-slic = { version = "0.1.1", optional = true }
|
||||
riscv-slic = { version = "0.2.0", optional = true }
|
||||
esp32c3 = { version = "0.27.0", optional = true }
|
||||
riscv = { version = "0.12.1", optional = true }
|
||||
cortex-m = { version = "0.7.0", optional = true }
|
||||
|
|
@ -63,7 +63,12 @@ riscv-esp32c3-backend = ["esp32c3", "riscv", "rtic-macros/riscv-esp32c3"]
|
|||
riscv-clint-backend = [
|
||||
"riscv",
|
||||
"riscv-slic/clint-backend",
|
||||
"rtic-macros/riscv-slic",
|
||||
"rtic-macros/riscv-clint",
|
||||
]
|
||||
riscv-mecall-backend = [
|
||||
"riscv",
|
||||
"riscv-slic/mecall-backend",
|
||||
"rtic-macros/riscv-mecall",
|
||||
]
|
||||
|
||||
# needed for testing
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ fn main() {
|
|||
"riscv-esp32c3-backend" => {
|
||||
println!("cargo:rustc-cfg=feature=\"riscv-esp32c3\"");
|
||||
}
|
||||
"riscv-clint-backend" => {
|
||||
"riscv-clint-backend" | "riscv-mecall-backend" => {
|
||||
println!("cargo:rustc-cfg=feature=\"riscv-slic\"");
|
||||
}
|
||||
_ => {
|
||||
|
|
|
|||
|
|
@ -1,7 +1,10 @@
|
|||
pub use riscv_slic::{lock, pend, run, InterruptNumber};
|
||||
|
||||
#[cfg(all(feature = "riscv-slic", not(feature = "riscv-clint-backend")))]
|
||||
compile_error!("Building for the riscv-slic, but 'riscv-clint-backend' not selected");
|
||||
#[cfg(all(
|
||||
feature = "riscv-slic",
|
||||
not(any(feature = "riscv-clint-backend", feature = "riscv-mecall-backend"))
|
||||
))]
|
||||
compile_error!("Building for the riscv-slic, but no compatible backend selected");
|
||||
|
||||
/// USE CASE RE-EXPORTS: needed for SLIC-only
|
||||
pub use riscv_slic::{self, clear_interrupts, codegen, set_interrupts, set_priority};
|
||||
|
|
|
|||
|
|
@ -167,8 +167,10 @@ pub enum Backends {
|
|||
Thumbv8Base,
|
||||
Thumbv8Main,
|
||||
RiscvEsp32C3,
|
||||
Riscv32ImcClint, // not working yet (issues with portable-atomic features...)
|
||||
Riscv32ImcClint,
|
||||
Riscv32ImcMecall,
|
||||
Riscv32ImacClint,
|
||||
Riscv32ImacMecall,
|
||||
}
|
||||
|
||||
impl Backends {
|
||||
|
|
@ -179,8 +181,10 @@ impl Backends {
|
|||
Backends::Thumbv7 => ARMV7M,
|
||||
Backends::Thumbv8Base => ARMV8MBASE,
|
||||
Backends::Thumbv8Main => ARMV8MMAIN,
|
||||
Backends::Riscv32ImcClint | Backends::RiscvEsp32C3 => RISCV32IMC,
|
||||
Backends::Riscv32ImacClint => RISCV32IMAC,
|
||||
Backends::Riscv32ImcClint | Backends::Riscv32ImcMecall | Backends::RiscvEsp32C3 => {
|
||||
RISCV32IMC
|
||||
}
|
||||
Backends::Riscv32ImacClint | Backends::Riscv32ImacMecall => RISCV32IMAC,
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -193,6 +197,7 @@ impl Backends {
|
|||
Backends::Thumbv8Main => "thumbv8main-backend",
|
||||
Backends::RiscvEsp32C3 => "riscv-esp32c3-backend",
|
||||
Backends::Riscv32ImcClint | Backends::Riscv32ImacClint => "riscv-clint-backend",
|
||||
Backends::Riscv32ImcMecall | Backends::Riscv32ImacMecall => "riscv-mecall-backend",
|
||||
}
|
||||
}
|
||||
#[allow(clippy::wrong_self_convention)]
|
||||
|
|
@ -202,6 +207,7 @@ impl Backends {
|
|||
Backends::Thumbv7 | Backends::Thumbv8Main => "cortex-m-basepri",
|
||||
Backends::RiscvEsp32C3 => "riscv-esp32c3",
|
||||
Backends::Riscv32ImcClint | Backends::Riscv32ImacClint => "riscv-clint",
|
||||
Backends::Riscv32ImcMecall | Backends::Riscv32ImacMecall => "riscv-mecall",
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -246,7 +252,12 @@ impl Platforms {
|
|||
let c = "-C".to_string();
|
||||
match self {
|
||||
Platforms::Esp32C3 => vec![c, "link-arg=-Tlinkall.x".to_string()],
|
||||
Platforms::Hifive1 => vec![c, "link-arg=-Thifive1-link.x".to_string()],
|
||||
Platforms::Hifive1 => vec![
|
||||
c.clone(),
|
||||
"link-arg=-Thifive1-link.x".to_string(),
|
||||
c,
|
||||
"portable_atomic_target_feature=\"zaamo\"".to_string(),
|
||||
],
|
||||
Platforms::Lm3s6965 => vec![c, "link-arg=-Tlink.x".to_string()],
|
||||
Platforms::Nrf52840 => vec![
|
||||
c.clone(),
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue