From 183e73904a5d14e29f8a7edbb2d9553dddb736af Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rom=C3=A1n=20C=C3=A1rdenas=20Rodr=C3=ADguez?= Date: Wed, 23 Oct 2024 18:50:12 +0200 Subject: [PATCH] Prepare for new riscv ecosystem --- examples/hifive1/.cargo/config.toml | 4 +- examples/hifive1/Cargo.lock | 178 ++++++++---------- examples/hifive1/Cargo.toml | 11 +- examples/hifive1/examples/prio_inheritance.rs | 5 +- examples/hifive1/examples/static.rs | 8 +- examples/hifive1/examples/task.rs | 6 +- examples/hifive1/examples/zero_prio_task.rs | 6 +- rtic-macros/Cargo.toml | 2 + .../src/codegen/bindings/riscv_slic.rs | 22 ++- rtic-macros/src/syntax/backend/riscv_slic.rs | 19 +- rtic/Cargo.toml | 9 +- rtic/build.rs | 2 +- rtic/src/export/slic.rs | 7 +- xtask/src/argument_parsing.rs | 19 +- 14 files changed, 164 insertions(+), 134 deletions(-) diff --git a/examples/hifive1/.cargo/config.toml b/examples/hifive1/.cargo/config.toml index 2ce90b25db0..ab912d0a36a 100644 --- a/examples/hifive1/.cargo/config.toml +++ b/examples/hifive1/.cargo/config.toml @@ -3,9 +3,9 @@ runner = "qemu-system-riscv32 -machine sifive_e,revb=true -nographic -semihostin # runner = "riscv64-unknown-elf-gdb -q -x gdb_init" rustflags = [ "-C", "link-arg=-Thifive1-link.x", + "--cfg", "portable_atomic_target_feature=\"zaamo\"", ] [build] # Pick ONE of these compilation targets -# target = "riscv32imc-unknown-none-elf" # non-atomic support -target = "riscv32imac-unknown-none-elf" # atomic support (partial) +target = "riscv32imc-unknown-none-elf" diff --git a/examples/hifive1/Cargo.lock b/examples/hifive1/Cargo.lock index 76374dcb484..393e33a01fa 100644 --- a/examples/hifive1/Cargo.lock +++ b/examples/hifive1/Cargo.lock @@ -16,59 +16,51 @@ checksum = "1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b" [[package]] name = "critical-section" -version = "1.1.2" +version = "1.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7059fff8937831a9ae6f0fe4d658ffabf58f2ca96aa9dec1c889f936f705f216" +checksum = "790eea4361631c5e7d22598ecd5723ff611904e3344ce8720784c93e3d83d40b" [[package]] name = "e310x" -version = "0.11.0" -source = "git+https://github.com/greenlsi/e310x.git?branch=master#50536cc5be2fd6adf7f879f002fdd98f66fb05f9" +version = "0.12.0" +source = "git+https://github.com/riscv-rust/e310x.git?branch=ehv1#ddc85fd4a8138c24d8080810469fb354ccb46d2d" dependencies = [ "critical-section", - "riscv-pac", - "riscv-peripheral", - "vcell", -] - -[[package]] -name = "e310x" -version = "0.11.0" -source = "git+https://github.com/greenlsi/e310x.git#50536cc5be2fd6adf7f879f002fdd98f66fb05f9" -dependencies = [ - "riscv-pac", + "riscv", "riscv-peripheral", + "riscv-rt", "vcell", ] [[package]] name = "e310x-hal" -version = "0.11.0" -source = "git+https://github.com/greenlsi/e310x-hal.git?branch=master#931aea7ab142c1eb9eaadd4150946d8452229f27" +version = "0.12.0" +source = "git+https://github.com/riscv-rust/e310x.git?branch=ehv1#ddc85fd4a8138c24d8080810469fb354ccb46d2d" dependencies = [ - "e310x 0.11.0 (git+https://github.com/greenlsi/e310x.git?branch=master)", - "embedded-hal 0.2.7", - "nb 1.1.0", + "e310x", + "embedded-hal", + "embedded-hal-nb", + "nb", "portable-atomic", "riscv", ] -[[package]] -name = "embedded-hal" -version = "0.2.7" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "35949884794ad573cf46071e41c9b60efb0cb311e3ca01f7af807af1debc66ff" -dependencies = [ - "nb 0.1.3", - "void", -] - [[package]] name = "embedded-hal" version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "361a90feb7004eca4019fb28352a9465666b24f840f5c3cddf0ff13920590b89" +[[package]] +name = "embedded-hal-nb" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fba4268c14288c828995299e59b12babdbe170f6c6d73731af1b4648142e8605" +dependencies = [ + "embedded-hal", + "nb", +] + [[package]] name = "equivalent" version = "1.0.1" @@ -97,17 +89,18 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0bfb9eb618601c89945a70e254898da93b13be0388091d42117462b265bb3fad" dependencies = [ "hash32", + "portable-atomic", "stable_deref_trait", ] [[package]] name = "hifive1" -version = "0.11.0" -source = "git+https://github.com/romancardenas/hifive1.git#ef8cea8b90bddb04509785d3e148ff145137520a" +version = "0.14.0" +source = "git+https://github.com/riscv-rust/e310x.git?branch=ehv1#ddc85fd4a8138c24d8080810469fb354ccb46d2d" dependencies = [ + "critical-section", "e310x-hal", - "embedded-hal 0.2.7", - "nb 1.1.0", + "nb", "riscv", ] @@ -121,15 +114,6 @@ dependencies = [ "hashbrown", ] -[[package]] -name = "nb" -version = "0.1.3" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "801d31da0513b6ec5214e9bf433a77966320625a37860f910be265be6e18d06f" -dependencies = [ - "nb 1.1.0", -] - [[package]] name = "nb" version = "1.1.0" @@ -137,33 +121,37 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "8d5439c4ad607c3c23abf66de8c8bf57ba8adcd1f129e699851a6e43935d339d" [[package]] -name = "portable-atomic" -version = "1.6.0" +name = "paste" +version = "1.0.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7170ef9988bc169ba16dd36a7fa041e5c4cbeb6a35b76d4c03daded371eae7c0" +checksum = "57c0d7b74b563b49d38dae00a0c37d4d6de9b432382b2892f0574ddcae73fd0a" [[package]] -name = "proc-macro-error" -version = "1.0.4" +name = "portable-atomic" +version = "1.9.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "da25490ff9892aab3fcf7c36f08cfb902dd3e71ca0f9f9517bea02a73a5ce38c" +checksum = "cc9c68a3f6da06753e9335d63e27f6b9754dd1920d941135b7ea8224f141adb2" + +[[package]] +name = "proc-macro-error-attr2" +version = "2.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "96de42df36bb9bba5542fe9f1a054b8cc87e172759a1868aa05c1f3acc89dfc5" dependencies = [ - "proc-macro-error-attr", "proc-macro2", "quote", - "syn 1.0.109", - "version_check", ] [[package]] -name = "proc-macro-error-attr" -version = "1.0.4" +name = "proc-macro-error2" +version = "2.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a1be40180e52ecc98ad80b184934baf3d0d29f979574e439af5a55274b35f869" +checksum = "11ec05c52be0a07b08061f7dd003e7d7092e0472bc731b4af7bb1ef876109802" dependencies = [ + "proc-macro-error-attr2", "proc-macro2", "quote", - "version_check", + "syn", ] [[package]] @@ -186,57 +174,71 @@ dependencies = [ [[package]] name = "riscv" -version = "0.11.1" +version = "0.12.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2f5c1b8bf41ea746266cdee443d1d1e9125c86ce1447e1a2615abd34330d33a9" +checksum = "5ea8ff73d3720bdd0a97925f0bf79ad2744b6da8ff36be3840c48ac81191d7a7" dependencies = [ "critical-section", - "embedded-hal 1.0.0", + "embedded-hal", + "paste", + "riscv-macros", + "riscv-pac", +] + +[[package]] +name = "riscv-macros" +version = "0.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f265be5d634272320a7de94cea15c22a3bfdd4eb42eb43edc528415f066a1f25" +dependencies = [ + "proc-macro2", + "quote", + "syn", ] [[package]] name = "riscv-pac" -version = "0.1.1" +version = "0.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "18ceb4af23fdad434f938afdc35ce895a63d84f7333bb127d8065030848eb6a6" +checksum = "8188909339ccc0c68cfb5a04648313f09621e8b87dc03095454f1a11f6c5d436" [[package]] name = "riscv-peripheral" -version = "0.1.0" +version = "0.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "07c799fe4e144bd4dd0c68fa33a41c1485f19730eea505d195124636e1253358" +checksum = "62858721c9afcfff0fe501db36f543c6498b64d3630446166b270625f09c3eec" dependencies = [ - "embedded-hal 1.0.0", + "embedded-hal", "riscv", "riscv-pac", ] [[package]] name = "riscv-rt" -version = "0.12.2" +version = "0.13.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c0d35e32cf1383183e8885d8a9aa4402a087fd094dc34c2cb6df6687d0229dfe" +checksum = "753f1bd7eb4e0003cec5e2fb60ea8e253a71d0b041bc7d1ba0fffe22e3c0294d" dependencies = [ "riscv", + "riscv-pac", "riscv-rt-macros", ] [[package]] name = "riscv-rt-macros" -version = "0.2.1" +version = "0.2.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a8d100d466dbb76681ef6a9386f3da9abc570d57394e86da0ba5af8c4408486d" +checksum = "30f19a85fe107b65031e0ba8ec60c34c2494069fe910d6c297f5e7cb5a6f76d0" dependencies = [ "proc-macro2", "quote", - "syn 1.0.109", + "syn", ] [[package]] name = "riscv-slic" version = "0.1.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c6e12f8155a8ba8ed8dae9d68c36becb651308416592e7b45a4769d5d545385b" +source = "git+https://github.com/romancardenas/riscv-slic.git?branch=mecall#a4800b26bfa8c1e46567703bed3154b137032023" dependencies = [ "critical-section", "heapless", @@ -247,12 +249,11 @@ dependencies = [ [[package]] name = "riscv-slic-macros" version = "0.1.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d246759b5f1486fffb3153b5d74c964a53e88d2176dbc57c3c00aba5587a81a6" +source = "git+https://github.com/romancardenas/riscv-slic.git?branch=mecall#a4800b26bfa8c1e46567703bed3154b137032023" dependencies = [ "proc-macro2", "quote", - "syn 2.0.49", + "syn", ] [[package]] @@ -279,19 +280,19 @@ name = "rtic-macros" version = "2.1.0" dependencies = [ "indexmap", - "proc-macro-error", + "proc-macro-error2", "proc-macro2", "quote", - "syn 2.0.49", + "syn", ] [[package]] name = "rtic_hifive1" version = "0.1.0" dependencies = [ - "e310x 0.11.0 (git+https://github.com/greenlsi/e310x.git)", "heapless", "hifive1", + "portable-atomic", "riscv", "riscv-rt", "rtic", @@ -310,17 +311,6 @@ version = "1.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "a8f112729512f8e442d81f95a8a7ddf2b7c6b8a1a6f509a95864142b30cab2d3" -[[package]] -name = "syn" -version = "1.0.109" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "72b64191b275b66ffe2469e8af2c1cfe3bafa67b529ead792a6d0160888b4237" -dependencies = [ - "proc-macro2", - "quote", - "unicode-ident", -] - [[package]] name = "syn" version = "2.0.49" @@ -343,15 +333,3 @@ name = "vcell" version = "0.1.3" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "77439c1b53d2303b20d9459b1ade71a83c716e3f9c34f3228c00e6f185d6c002" - -[[package]] -name = "version_check" -version = "0.9.4" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f" - -[[package]] -name = "void" -version = "1.0.2" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d" diff --git a/examples/hifive1/Cargo.toml b/examples/hifive1/Cargo.toml index 42d60a7104c..fcd572943f6 100644 --- a/examples/hifive1/Cargo.toml +++ b/examples/hifive1/Cargo.toml @@ -10,13 +10,14 @@ edition = "2021" [dependencies] rtic = { path = "../../rtic" } -heapless = "0.8.0" -hifive1 = { git = "https://github.com/romancardenas/hifive1.git", features = ["board-redv"] } -e310x = { git = "https://github.com/greenlsi/e310x.git", features = ["rt"]} -riscv-rt = {version = "0.12.1", features = ["single-hart"]} -riscv = "0.11.0" +heapless = { version = "0.8.0", features = ["portable-atomic-unsafe-assume-single-core"] } +hifive1 = { git = "https://github.com/riscv-rust/e310x.git", branch = "ehv1", features = ["board-redv"] } +riscv-rt = {version = "0.13.0", features = ["single-hart"]} +riscv = "0.12.1" semihosting = { version = "0.1", features = ["stdio", "panic-handler"] } +portable-atomic = { version = "1.9", features = ["unsafe-assume-single-core", "force-amo"] } [features] riscv-clint-backend = ["rtic/riscv-clint-backend"] +riscv-mecall-backend = ["rtic/riscv-mecall-backend"] test-critical-section = [] diff --git a/examples/hifive1/examples/prio_inheritance.rs b/examples/hifive1/examples/prio_inheritance.rs index 5fc23996463..080a13c3497 100644 --- a/examples/hifive1/examples/prio_inheritance.rs +++ b/examples/hifive1/examples/prio_inheritance.rs @@ -1,10 +1,13 @@ #![no_main] #![no_std] +use hifive1::hal::e310x; use riscv_rt as _; -#[rtic::app(device = e310x, backend = HART0)] +#[cfg_attr(feature = "riscv-mecall-backend", rtic::app(device = e310x))] +#[cfg_attr(feature = "riscv-clint-backend", rtic::app(device = e310x, backend = H0))] mod app { + use super::e310x; use core::{future::Future, pin::Pin, task::Context, task::Poll}; use hifive1::hal::prelude::*; use semihosting::{println, process::exit}; diff --git a/examples/hifive1/examples/static.rs b/examples/hifive1/examples/static.rs index 34e71c646c9..2922ddafb6a 100644 --- a/examples/hifive1/examples/static.rs +++ b/examples/hifive1/examples/static.rs @@ -5,13 +5,15 @@ #![deny(unsafe_code)] #![deny(missing_docs)] -use hifive1 as _; +use hifive1::hal::e310x; use riscv_rt as _; -#[rtic::app(device = e310x, backend = HART0)] +#[cfg_attr(feature = "riscv-mecall-backend", rtic::app(device = e310x))] +#[cfg_attr(feature = "riscv-clint-backend", rtic::app(device = e310x, backend = H0))] mod app { - use semihosting::{process::exit, println}; + use super::e310x; use heapless::spsc::{Consumer, Producer, Queue}; + use semihosting::{println, process::exit}; #[shared] struct Shared {} diff --git a/examples/hifive1/examples/task.rs b/examples/hifive1/examples/task.rs index 6968edb2212..2aeefe54e0e 100644 --- a/examples/hifive1/examples/task.rs +++ b/examples/hifive1/examples/task.rs @@ -5,11 +5,13 @@ #![deny(unsafe_code)] #![deny(missing_docs)] -use hifive1 as _; +use hifive1::hal::e310x; use riscv_rt as _; -#[rtic::app(device = e310x, backend = HART0)] +#[cfg_attr(feature = "riscv-mecall-backend", rtic::app(device = e310x))] +#[cfg_attr(feature = "riscv-clint-backend", rtic::app(device = e310x, backend = H0))] mod app { + use super::e310x; use semihosting::{println, process::exit}; #[shared] diff --git a/examples/hifive1/examples/zero_prio_task.rs b/examples/hifive1/examples/zero_prio_task.rs index 2528c4fa15d..c1e1cd87d8e 100644 --- a/examples/hifive1/examples/zero_prio_task.rs +++ b/examples/hifive1/examples/zero_prio_task.rs @@ -6,7 +6,7 @@ #![deny(missing_docs)] use core::marker::PhantomData; -use hifive1 as _; +use hifive1::hal::e310x; use riscv_rt as _; /// Does not impl send @@ -14,8 +14,10 @@ pub struct NotSend { _0: PhantomData<*const ()>, } -#[rtic::app(device = e310x, backend = HART0)] +#[cfg_attr(feature = "riscv-mecall-backend", rtic::app(device = e310x))] +#[cfg_attr(feature = "riscv-clint-backend", rtic::app(device = e310x, backend = H0))] mod app { + use super::e310x; use super::NotSend; use core::marker::PhantomData; use semihosting::{println, process::exit}; diff --git a/rtic-macros/Cargo.toml b/rtic-macros/Cargo.toml index 8611472c067..d4791b69b6a 100644 --- a/rtic-macros/Cargo.toml +++ b/rtic-macros/Cargo.toml @@ -40,6 +40,8 @@ riscv-esp32c3 = [] # riscv-clic = [] # riscv-ch32 = [] riscv-slic = [] +riscv-clint = ["riscv-slic"] +riscv-mecall= ["riscv-slic"] # backend API test test-template = [] diff --git a/rtic-macros/src/codegen/bindings/riscv_slic.rs b/rtic-macros/src/codegen/bindings/riscv_slic.rs index c9bf50adbfe..f2dc9edced1 100644 --- a/rtic-macros/src/codegen/bindings/riscv_slic.rs +++ b/rtic-macros/src/codegen/bindings/riscv_slic.rs @@ -13,7 +13,7 @@ use syn::{parse, Attribute, Ident}; /// Utility function to get the SLIC interrupt module. pub fn interrupt_ident() -> Ident { let span = Span::call_site(); - Ident::new("Interrupt", span) + Ident::new("SoftwareInterrupt", span) } pub fn interrupt_mod(_app: &App) -> TokenStream2 { @@ -119,7 +119,7 @@ pub fn pre_init_enable_interrupts(app: &App, analysis: &CodegenAnalysis) -> Vec< .map(|task| (&task.args.priority, &task.args.binds)), ) { stmts.push(quote!( - rtic::export::set_priority(slic::Interrupt::#name, #p); + rtic::export::set_priority(slic::SoftwareInterrupt::#name, #p); )); } // Finally, we activate the interrupts @@ -153,11 +153,11 @@ pub fn architecture_specific_analysis(app: &App, _analysis: &SyntaxAnalysis) -> return Err(parse::Error::new(first.unwrap().span(), s)); } - + #[cfg(feature = "riscv-clint")] if app.args.backend.is_none() { return Err(parse::Error::new( Span::call_site(), - "SLIC requires backend-specific configuration", + "CLINT requires backend-specific configuration", )); } @@ -247,9 +247,19 @@ pub fn extra_modules(app: &App, _analysis: &SyntaxAnalysis) -> Vec stmts.push(quote!( use rtic::export::riscv_slic; )); - let hart_id = &app.args.backend.as_ref().unwrap().hart_id; + let slic = quote! {rtic::export::riscv_slic}; - stmts.push(quote!(rtic::export::codegen!(pac = #device, swi = [#(#swi_slice,)*], backend = [hart_id = #hart_id]);)); + match () { + #[cfg(feature = "riscv-clint")] + () => { + let hart_id = &app.args.backend.as_ref().unwrap().hart_id; + stmts.push(quote!(rtic::export::codegen!(slic = #slic, pac = #device, swi = [#(#swi_slice,)*], backend = [hart_id = #hart_id]);)); + } + #[cfg(feature = "riscv-mecall")] + () => { + stmts.push(quote!(rtic::export::codegen!(slic = #slic, pac = #device, swi = [#(#swi_slice,)*]);)); + } + } stmts } diff --git a/rtic-macros/src/syntax/backend/riscv_slic.rs b/rtic-macros/src/syntax/backend/riscv_slic.rs index 2ed8e7735d2..b579b0181ad 100644 --- a/rtic-macros/src/syntax/backend/riscv_slic.rs +++ b/rtic-macros/src/syntax/backend/riscv_slic.rs @@ -1,16 +1,27 @@ use syn::{ parse::{Parse, ParseStream}, - Ident, Result, + Result, }; #[derive(Debug)] pub struct BackendArgs { - pub hart_id: Ident, + #[cfg(feature = "riscv-clint")] + pub hart_id: syn::Ident, } impl Parse for BackendArgs { fn parse(input: ParseStream) -> Result { - let hart_id = input.parse()?; - Ok(BackendArgs { hart_id }) + match () { + #[cfg(feature = "riscv-clint")] + () => { + let hart_id = input.parse()?; + Ok(BackendArgs { hart_id }) + } + #[cfg(feature = "riscv-mecall")] + () => Err(syn::Error::new( + input.span(), + "riscv-mecall backend does not accept any arguments", + )), + } } } diff --git a/rtic/Cargo.toml b/rtic/Cargo.toml index 80a40a8e715..ee6b0e30dd1 100644 --- a/rtic/Cargo.toml +++ b/rtic/Cargo.toml @@ -25,7 +25,7 @@ features = ["thumbv7-backend"] name = "rtic" [dependencies] -riscv-slic = { version = "0.1.1", optional = true } +riscv-slic = { version = "0.2.0", optional = true } esp32c3 = { version = "0.27.0", optional = true } riscv = { version = "0.12.1", optional = true } cortex-m = { version = "0.7.0", optional = true } @@ -63,7 +63,12 @@ riscv-esp32c3-backend = ["esp32c3", "riscv", "rtic-macros/riscv-esp32c3"] riscv-clint-backend = [ "riscv", "riscv-slic/clint-backend", - "rtic-macros/riscv-slic", + "rtic-macros/riscv-clint", +] +riscv-mecall-backend = [ + "riscv", + "riscv-slic/mecall-backend", + "rtic-macros/riscv-mecall", ] # needed for testing diff --git a/rtic/build.rs b/rtic/build.rs index 8c87b568c15..a1fed298aef 100644 --- a/rtic/build.rs +++ b/rtic/build.rs @@ -27,7 +27,7 @@ fn main() { "riscv-esp32c3-backend" => { println!("cargo:rustc-cfg=feature=\"riscv-esp32c3\""); } - "riscv-clint-backend" => { + "riscv-clint-backend" | "riscv-mecall-backend" => { println!("cargo:rustc-cfg=feature=\"riscv-slic\""); } _ => { diff --git a/rtic/src/export/slic.rs b/rtic/src/export/slic.rs index f0c17a32cba..626fdcb1c6c 100644 --- a/rtic/src/export/slic.rs +++ b/rtic/src/export/slic.rs @@ -1,7 +1,10 @@ pub use riscv_slic::{lock, pend, run, InterruptNumber}; -#[cfg(all(feature = "riscv-slic", not(feature = "riscv-clint-backend")))] -compile_error!("Building for the riscv-slic, but 'riscv-clint-backend' not selected"); +#[cfg(all( + feature = "riscv-slic", + not(any(feature = "riscv-clint-backend", feature = "riscv-mecall-backend")) +))] +compile_error!("Building for the riscv-slic, but no compatible backend selected"); /// USE CASE RE-EXPORTS: needed for SLIC-only pub use riscv_slic::{self, clear_interrupts, codegen, set_interrupts, set_priority}; diff --git a/xtask/src/argument_parsing.rs b/xtask/src/argument_parsing.rs index 8707ec5d120..f50e2851fd9 100644 --- a/xtask/src/argument_parsing.rs +++ b/xtask/src/argument_parsing.rs @@ -167,8 +167,10 @@ pub enum Backends { Thumbv8Base, Thumbv8Main, RiscvEsp32C3, - Riscv32ImcClint, // not working yet (issues with portable-atomic features...) + Riscv32ImcClint, + Riscv32ImcMecall, Riscv32ImacClint, + Riscv32ImacMecall, } impl Backends { @@ -179,8 +181,10 @@ impl Backends { Backends::Thumbv7 => ARMV7M, Backends::Thumbv8Base => ARMV8MBASE, Backends::Thumbv8Main => ARMV8MMAIN, - Backends::Riscv32ImcClint | Backends::RiscvEsp32C3 => RISCV32IMC, - Backends::Riscv32ImacClint => RISCV32IMAC, + Backends::Riscv32ImcClint | Backends::Riscv32ImcMecall | Backends::RiscvEsp32C3 => { + RISCV32IMC + } + Backends::Riscv32ImacClint | Backends::Riscv32ImacMecall => RISCV32IMAC, } } @@ -193,6 +197,7 @@ impl Backends { Backends::Thumbv8Main => "thumbv8main-backend", Backends::RiscvEsp32C3 => "riscv-esp32c3-backend", Backends::Riscv32ImcClint | Backends::Riscv32ImacClint => "riscv-clint-backend", + Backends::Riscv32ImcMecall | Backends::Riscv32ImacMecall => "riscv-mecall-backend", } } #[allow(clippy::wrong_self_convention)] @@ -202,6 +207,7 @@ impl Backends { Backends::Thumbv7 | Backends::Thumbv8Main => "cortex-m-basepri", Backends::RiscvEsp32C3 => "riscv-esp32c3", Backends::Riscv32ImcClint | Backends::Riscv32ImacClint => "riscv-clint", + Backends::Riscv32ImcMecall | Backends::Riscv32ImacMecall => "riscv-mecall", } } } @@ -246,7 +252,12 @@ impl Platforms { let c = "-C".to_string(); match self { Platforms::Esp32C3 => vec![c, "link-arg=-Tlinkall.x".to_string()], - Platforms::Hifive1 => vec![c, "link-arg=-Thifive1-link.x".to_string()], + Platforms::Hifive1 => vec![ + c.clone(), + "link-arg=-Thifive1-link.x".to_string(), + c, + "portable_atomic_target_feature=\"zaamo\"".to_string(), + ], Platforms::Lm3s6965 => vec![c, "link-arg=-Tlink.x".to_string()], Platforms::Nrf52840 => vec![ c.clone(),