Román Cárdenas Rodríguez 4060c3def8 RISC-V support over CLINT (#815) ... * Rebase to master * using interrupt_mod * bug fixes * fix other backends * Add changelog * forgot about rtic-macros * backend-specific configuration * core peripherals optional over macro argument * pre_init_preprocessing binding * CI for RISC-V (WIP) * separation of concerns * add targets for RISC-V examples * remove qemu feature * prepare examples folder * move examples all together * move ci out of examples * minor changes * add cortex-m * new xtask: proof of concept * fix build.yml * feature typo * clean rtic examples * reproduce weird issue * remove unsafe code in user app * update dependencies * allow builds on riscv32imc * let's fix QEMU * Update .github/workflows/build.yml Co-authored-by: Henrik Tjäder <henrik@tjaders.com> * New build.rs * removing test features * adapt ui test to new version of clippy * add more examples to RISC-V backend * proper configuration of heapless for riscv32imc * opt-out examples for riscv32imc * point to new version of riscv-slic * adapt new macro bindings * adapt examples and CI to stable * fix cortex-m CI * Review --------- Co-authored-by: Henrik Tjäder <henrik@tjaders.com>		2024-03-20 20:06:47 +00:00
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src	Fix race condition in calculate_now (#860)	2023-12-06 18:36:09 +00:00
.gitignore	Add rtic-timer (timerqueue + monotonic) and rtic-monotonics (systick-monotonic)	2023-03-01 00:33:31 +01:00
build.rs	Fix nightly compiler CI failure	2024-02-23 08:37:35 +01:00
Cargo.toml	Update stm32-metapac requirement from 14.0.0 to 15.0.0 (#884)	2024-01-16 06:56:41 +00:00
CHANGELOG.md	RISC-V support over CLINT (#815)	2024-03-20 20:06:47 +00:00