bors[bot] b87fca3d21 Merge #652 ... 652: Remove use of basepri register on thumbv8m.base r=AfoHT a=neonquill The basepri register appears to be aviable on thumbv8m.main but not thumbv8m.base. At the very least, attempting to compile against a Cortex-M23 based Microchip ATSAML10E16A generates an error: ``` error[E0432]: unresolved import `cortex_m::register::basepri` --> /Users/dwatson/.cargo/registry/src/github.com-1ecc6299db9ec823/cortex-m-rtic-1.1.3/src/export.rs:25:5 | 25 | use cortex_m::register::basepri; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ no `basepri` in `register` ``` I wasn't sure if it made more sense to replace the `armv7m` config flag with something related to basepri availability or to get closer to matching the cortex-m use of several architecture specific flags. In the end i chose to make the minimal change possible and just narrowed the existing `thumbv8m` check. Context: [cortex-m:src/register/mod.rs](4e90862520/src/register/mod.rs (L33)): ``` #[cfg(all(not(armv6m), not(armv8m_base)))] pub mod basepri; ``` [cortex-m:build.rs](4e90862520/build.rs (L21)): ``` } else if target.starts_with("thumbv8m.base") { println!("cargo:rustc-cfg=cortex_m"); println!("cargo:rustc-cfg=armv8m"); println!("cargo:rustc-cfg=armv8m_base"); ``` Co-authored-by: David Watson <david@neonquill.com>		2022-07-27 19:15:09 +00:00
..
codegen	Merge #652	2022-07-27 19:15:09 +00:00
tests	use tuple struct syntax for Monotonics everywhere	2021-07-21 10:14:00 +02:00
analyze.rs	Clippy with pedantic suggestions	2022-02-22 18:56:21 +01:00
check.rs	TQ handlers being generated	2020-12-08 20:49:13 +01:00
codegen.rs	Added support for SRP based scheduling for armv6m	2022-03-02 13:23:47 +01:00
lib.rs	Clippy with pedantic suggestions	2022-02-22 18:56:21 +01:00
tests.rs	Brutally yank out multicore	2020-09-01 14:50:06 +00:00