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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="SNVS_LP Control Register"><title>imxrt_ral::snvs::LPCR - Rust</title><script>if(window.location.protocol!=="file:")document.head.insertAdjacentHTML("beforeend","SourceSerif4-Regular-46f98efaafac5295.ttf.woff2,FiraSans-Regular-018c141bf0843ffd.woff2,FiraSans-Medium-8f9a781e4970d388.woff2,SourceCodePro-Regular-562dcc5011b6de7d.ttf.woff2,SourceCodePro-Semibold-d899c5a5c4aeb14a.ttf.woff2".split(",").map(f=>`<link rel="preload" as="font" type="font/woff2" crossorigin href="../../../static.files/${f}">`).join(""))</script><link rel="stylesheet" href="../../../static.files/normalize-76eba96aa4d2e634.css"><link rel="stylesheet" href="../../../static.files/rustdoc-b0742ba02757f159.css"><meta name="rustdoc-vars" data-root-path="../../../" data-static-root-path="../../../static.files/" data-current-crate="imxrt_ral" data-themes="" data-resource-suffix="" data-rustdoc-version="1.83.0 (90b35a623 2024-11-26)" data-channel="1.83.0" data-search-js="search-f0d225181b97f9a4.js" data-settings-js="settings-805db61a62df4bd2.js" ><script src="../../../static.files/storage-1d39b6787ed640ff.js"></script><script defer src="../sidebar-items.js"></script><script defer src="../../../static.files/main-f070b9041d14864c.js"></script><noscript><link rel="stylesheet" href="../../../static.files/noscript-0111fcff984fae8f.css"></noscript><link rel="alternate icon" type="image/png" href="../../../static.files/favicon-32x32-422f7d1d52889060.png"><link rel="icon" type="image/svg+xml" href="../../../static.files/favicon-2c020d218678b618.svg"></head><body class="rustdoc mod"><!--[if lte IE 11]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="mobile-topbar"><button class="sidebar-menu-toggle" title="show sidebar"></button></nav><nav class="sidebar"><div class="sidebar-crate"><h2><a href="../../../imxrt_ral/index.html">imxrt_<wbr>ral</a><span class="version">0.5.3</span></h2></div><div class="sidebar-elems"><section id="rustdoc-toc"><h2 class="location"><a href="#">Module LPCR</a></h2><h3><a href="#modules">Module Items</a></h3><ul class="block"><li><a href="#modules" title="Modules">Modules</a></li></ul></section><div id="rustdoc-modnav"><h2><a href="../index.html">In imxrt_<wbr>ral::<wbr>snvs</a></h2></div></div></nav><div class="sidebar-resizer"></div><main><div class="width-limiter"><rustdoc-search></rustdoc-search><section id="main-content" class="content"><div class="main-heading"><span class="rustdoc-breadcrumbs"><a href="../../index.html">imxrt_ral</a>::<wbr><a href="../index.html">snvs</a></span><h1>Module <span>LPCR</span><button id="copy-path" title="Copy item path to clipboard">Copy item path</button></h1><rustdoc-toolbar></rustdoc-toolbar><span class="sub-heading"><a class="src" href="../../../src/imxrt_ral/blocks/imxrt1011/snvs.rs.html#1201">source</a> </span></div><details class="toggle top-doc" open><summary class="hideme"><span>Expand description</span></summary><div class="docblock"><p>SNVS_LP Control Register</p>
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</div></details><h2 id="modules" class="section-header">Modules<a href="#modules" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="mod" href="BTN_PRESS_TIME/index.html" title="mod imxrt_ral::snvs::LPCR::BTN_PRESS_TIME">BTN_<wbr>PRESS_<wbr>TIME</a></div><div class="desc docblock-short">This field configures the button press time out values for the PMIC Logic</div></li><li><div class="item-name"><a class="mod" href="DEBOUNCE/index.html" title="mod imxrt_ral::snvs::LPCR::DEBOUNCE">DEBOUNCE</a></div><div class="desc docblock-short">This field configures the amount of debounce time for the BTN input signal</div></li><li><div class="item-name"><a class="mod" href="DP_EN/index.html" title="mod imxrt_ral::snvs::LPCR::DP_EN">DP_EN</a></div><div class="desc docblock-short">Dumb PMIC Enabled When set, software can control the system power</div></li><li><div class="item-name"><a class="mod" href="GPR_Z_DIS/index.html" title="mod imxrt_ral::snvs::LPCR::GPR_Z_DIS">GPR_<wbr>Z_<wbr>DIS</a></div><div class="desc docblock-short">General Purpose Registers Zeroization Disable</div></li><li><div class="item-name"><a class="mod" href="LPCALB_EN/index.html" title="mod imxrt_ral::snvs::LPCR::LPCALB_EN">LPCALB_<wbr>EN</a></div><div class="desc docblock-short">LP Calibration Enable When set, enables the SRTC calibration mechanism</div></li><li><div class="item-name"><a class="mod" href="LPCALB_VAL/index.html" title="mod imxrt_ral::snvs::LPCR::LPCALB_VAL">LPCALB_<wbr>VAL</a></div><div class="desc docblock-short">LP Calibration Value Defines signed calibration value for SRTC</div></li><li><div class="item-name"><a class="mod" href="LPTA_EN/index.html" title="mod imxrt_ral::snvs::LPCR::LPTA_EN">LPTA_EN</a></div><div class="desc docblock-short">LP Time Alarm Enable When set, the SNVS functional interrupt is asserted if the LP Time Alarm Register is equal to the 32 MSBs of the secure real time counter</div></li><li><div class="item-name"><a class="mod" href="LPWUI_EN/index.html" title="mod imxrt_ral::snvs::LPCR::LPWUI_EN">LPWUI_<wbr>EN</a></div><div class="desc docblock-short">LP Wake-Up Interrupt Enable This interrupt line should be connected to the external pin and is intended to inform the external chip about an SNVS_LP event (tamper event, MC rollover, SRTC rollover, or time alarm )</div></li><li><div class="item-name"><a class="mod" href="MC_ENV/index.html" title="mod imxrt_ral::snvs::LPCR::MC_ENV">MC_ENV</a></div><div class="desc docblock-short">Monotonic Counter Enabled and Valid When set, the MC can be incremented (by write transaction to the LPSMCMR or LPSMCLR)</div></li><li><div class="item-name"><a class="mod" href="ON_TIME/index.html" title="mod imxrt_ral::snvs::LPCR::ON_TIME">ON_TIME</a></div><div class="desc docblock-short">The ON_TIME field is used to configure the period of time after BTN is asserted before pmic_en_b is asserted to turn on the SoC power</div></li><li><div class="item-name"><a class="mod" href="PK_EN/index.html" title="mod imxrt_ral::snvs::LPCR::PK_EN">PK_EN</a></div><div class="desc docblock-short">PMIC On Request Enable The value written to PK_EN will be asserted on output signal snvs_lp_pk_en</div></li><li><div class="item-name"><a class="mod" href="PK_OVERRIDE/index.html" title="mod imxrt_ral::snvs::LPCR::PK_OVERRIDE">PK_<wbr>OVERRIDE</a></div><div class="desc docblock-short">PMIC On Request Override The value written to PK_OVERRIDE will be asserted on output signal snvs_lp_pk_override</div></li><li><div class="item-name"><a class="mod" href="PWR_GLITCH_EN/index.html" title="mod imxrt_ral::snvs::LPCR::PWR_GLITCH_EN">PWR_<wbr>GLITCH_<wbr>EN</a></div><div class="desc docblock-short">Power Glitch Enable By default the detection of a power glitch does not cause the pmic_en_b signal to be asserted</div></li><li><div class="item-name"><a class="mod" href="SRTC_ENV/index.html" title="mod imxrt_ral::snvs::LPCR::SRTC_ENV">SRTC_<wbr>ENV</a></div><div class="desc docblock-short">Secure Real Time Counter Enabled and Valid When set, the SRTC becomes operational</div></li><li><div class="item-name"><a class="mod" href="SRTC_INV_EN/index.html" title="mod imxrt_ral::snvs::LPCR::SRTC_INV_EN">SRTC_<wbr>INV_<wbr>EN</a></div><div class="desc docblock-short">If this bit is 1, in the case of a security violation the SRTC stops counting and the SRTC is invalidated (SRTC_ENV bit is cleared)</div></li><li><div class="item-name"><a class="mod" href="TOP/index.html" title="mod imxrt_ral::snvs::LPCR::TOP">TOP</a></div><div class="desc docblock-short">Turn off System Power Asserting this bit causes a signal to be sent to the Power Management IC to turn off the system power</div></li></ul></section></div></main></body></html> |