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rtic/2/api/imxrt_ral/dcdc/REG0/index.html
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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="DCDC Register 0"><title>imxrt_ral::dcdc::REG0 - Rust</title><script>if(window.location.protocol!=="file:")document.head.insertAdjacentHTML("beforeend","SourceSerif4-Regular-46f98efaafac5295.ttf.woff2,FiraSans-Regular-018c141bf0843ffd.woff2,FiraSans-Medium-8f9a781e4970d388.woff2,SourceCodePro-Regular-562dcc5011b6de7d.ttf.woff2,SourceCodePro-Semibold-d899c5a5c4aeb14a.ttf.woff2".split(",").map(f=>`<link rel="preload" as="font" type="font/woff2" crossorigin href="../../../static.files/${f}">`).join(""))</script><link rel="stylesheet" href="../../../static.files/normalize-76eba96aa4d2e634.css"><link rel="stylesheet" href="../../../static.files/rustdoc-b0742ba02757f159.css"><meta name="rustdoc-vars" data-root-path="../../../" data-static-root-path="../../../static.files/" data-current-crate="imxrt_ral" data-themes="" data-resource-suffix="" data-rustdoc-version="1.83.0 (90b35a623 2024-11-26)" data-channel="1.83.0" data-search-js="search-f0d225181b97f9a4.js" data-settings-js="settings-805db61a62df4bd2.js" ><script src="../../../static.files/storage-1d39b6787ed640ff.js"></script><script defer src="../sidebar-items.js"></script><script defer src="../../../static.files/main-f070b9041d14864c.js"></script><noscript><link rel="stylesheet" href="../../../static.files/noscript-0111fcff984fae8f.css"></noscript><link rel="alternate icon" type="image/png" href="../../../static.files/favicon-32x32-422f7d1d52889060.png"><link rel="icon" type="image/svg+xml" href="../../../static.files/favicon-2c020d218678b618.svg"></head><body class="rustdoc mod"><!--[if lte IE 11]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="mobile-topbar"><button class="sidebar-menu-toggle" title="show sidebar"></button></nav><nav class="sidebar"><div class="sidebar-crate"><h2><a href="../../../imxrt_ral/index.html">imxrt_<wbr>ral</a><span class="version">0.5.3</span></h2></div><div class="sidebar-elems"><section id="rustdoc-toc"><h2 class="location"><a href="#">Module REG0</a></h2><h3><a href="#modules">Module Items</a></h3><ul class="block"><li><a href="#modules" title="Modules">Modules</a></li></ul></section><div id="rustdoc-modnav"><h2><a href="../index.html">In imxrt_<wbr>ral::<wbr>dcdc</a></h2></div></div></nav><div class="sidebar-resizer"></div><main><div class="width-limiter"><rustdoc-search></rustdoc-search><section id="main-content" class="content"><div class="main-heading"><span class="rustdoc-breadcrumbs"><a href="../../index.html">imxrt_ral</a>::<wbr><a href="../index.html">dcdc</a></span><h1>Module <span>REG0</span><button id="copy-path" title="Copy item path to clipboard">Copy item path</button></h1><rustdoc-toolbar></rustdoc-toolbar><span class="sub-heading"><a class="src" href="../../../src/imxrt_ral/blocks/imxrt1011/dcdc.rs.html#14">source</a> </span></div><details class="toggle top-doc" open><summary class="hideme"><span>Expand description</span></summary><div class="docblock"><p>DCDC Register 0</p>
</div></details><h2 id="modules" class="section-header">Modules<a href="#modules" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="mod" href="ADJ_POSLIMIT_BUCK/index.html" title="mod imxrt_ral::dcdc::REG0::ADJ_POSLIMIT_BUCK">ADJ_<wbr>POSLIMIT_<wbr>BUCK</a></div><div class="desc docblock-short">adjust value to poslimit_buck register</div></li><li><div class="item-name"><a class="mod" href="CURRENT_ALERT_RESET/index.html" title="mod imxrt_ral::dcdc::REG0::CURRENT_ALERT_RESET">CURRENT_<wbr>ALERT_<wbr>RESET</a></div><div class="desc docblock-short">reset current alert signal</div></li><li><div class="item-name"><a class="mod" href="CUR_SNS_THRSH/index.html" title="mod imxrt_ral::dcdc::REG0::CUR_SNS_THRSH">CUR_<wbr>SNS_<wbr>THRSH</a></div><div class="desc docblock-short">Set the threshold of current detector, if the peak current of the inductor exceeds the threshold, the current detector will assert</div></li><li><div class="item-name"><a class="mod" href="DISABLE_AUTO_CLK_SWITCH/index.html" title="mod imxrt_ral::dcdc::REG0::DISABLE_AUTO_CLK_SWITCH">DISABLE_<wbr>AUTO_<wbr>CLK_<wbr>SWITCH</a></div><div class="desc docblock-short">Disable automatic clock switch from internal osc to xtal clock.</div></li><li><div class="item-name"><a class="mod" href="EN_LP_OVERLOAD_SNS/index.html" title="mod imxrt_ral::dcdc::REG0::EN_LP_OVERLOAD_SNS">EN_<wbr>LP_<wbr>OVERLOAD_<wbr>SNS</a></div><div class="desc docblock-short">enable the overload detection in power save mode, if current is larger than the overloading threshold (typical value is 50 mA), DCDC will switch to the run mode automatically</div></li><li><div class="item-name"><a class="mod" href="LP_HIGH_HYS/index.html" title="mod imxrt_ral::dcdc::REG0::LP_HIGH_HYS">LP_<wbr>HIGH_<wbr>HYS</a></div><div class="desc docblock-short">Adjust hysteretic value in low power from 12.5mV to 25mV</div></li><li><div class="item-name"><a class="mod" href="LP_OVERLOAD_FREQ_SEL/index.html" title="mod imxrt_ral::dcdc::REG0::LP_OVERLOAD_FREQ_SEL">LP_<wbr>OVERLOAD_<wbr>FREQ_<wbr>SEL</a></div><div class="desc docblock-short">the period of counting the charging times in power save mode 0: eight 32k cycle 1: sixteen 32k cycle</div></li><li><div class="item-name"><a class="mod" href="LP_OVERLOAD_THRSH/index.html" title="mod imxrt_ral::dcdc::REG0::LP_OVERLOAD_THRSH">LP_<wbr>OVERLOAD_<wbr>THRSH</a></div><div class="desc docblock-short">the threshold of the counting number of charging times during the period that lp_overload_freq_sel sets in power save mode</div></li><li><div class="item-name"><a class="mod" href="OVERCUR_TRIG_ADJ/index.html" title="mod imxrt_ral::dcdc::REG0::OVERCUR_TRIG_ADJ">OVERCUR_<wbr>TRIG_<wbr>ADJ</a></div><div class="desc docblock-short">The threshold of over current detection in run mode and power save mode: run mode power save mode 0x0 1 A 0</div></li><li><div class="item-name"><a class="mod" href="PWD_CMP_BATT_DET/index.html" title="mod imxrt_ral::dcdc::REG0::PWD_CMP_BATT_DET">PWD_<wbr>CMP_<wbr>BATT_<wbr>DET</a></div><div class="desc docblock-short">set to “1” to power down the low voltage detection comparator</div></li><li><div class="item-name"><a class="mod" href="PWD_CMP_OFFSET/index.html" title="mod imxrt_ral::dcdc::REG0::PWD_CMP_OFFSET">PWD_<wbr>CMP_<wbr>OFFSET</a></div><div class="desc docblock-short">power down output range comparator</div></li><li><div class="item-name"><a class="mod" href="PWD_CUR_SNS_CMP/index.html" title="mod imxrt_ral::dcdc::REG0::PWD_CUR_SNS_CMP">PWD_<wbr>CUR_<wbr>SNS_<wbr>CMP</a></div><div class="desc docblock-short">The power down signal of the current detector.</div></li><li><div class="item-name"><a class="mod" href="PWD_HIGH_VOLT_DET/index.html" title="mod imxrt_ral::dcdc::REG0::PWD_HIGH_VOLT_DET">PWD_<wbr>HIGH_<wbr>VOLT_<wbr>DET</a></div><div class="desc docblock-short">power down overvoltage detection comparator</div></li><li><div class="item-name"><a class="mod" href="PWD_OSC_INT/index.html" title="mod imxrt_ral::dcdc::REG0::PWD_OSC_INT">PWD_<wbr>OSC_<wbr>INT</a></div><div class="desc docblock-short">Power down internal osc. Only set this bit, when 24 MHz crystal osc is available</div></li><li><div class="item-name"><a class="mod" href="PWD_OVERCUR_DET/index.html" title="mod imxrt_ral::dcdc::REG0::PWD_OVERCUR_DET">PWD_<wbr>OVERCUR_<wbr>DET</a></div><div class="desc docblock-short">power down overcurrent detection comparator</div></li><li><div class="item-name"><a class="mod" href="PWD_ZCD/index.html" title="mod imxrt_ral::dcdc::REG0::PWD_ZCD">PWD_ZCD</a></div><div class="desc docblock-short">power down the zero cross detection function for discontinuous conductor mode</div></li><li><div class="item-name"><a class="mod" href="SEL_CLK/index.html" title="mod imxrt_ral::dcdc::REG0::SEL_CLK">SEL_CLK</a></div><div class="desc docblock-short">select 24 MHz Crystal clock for DCDC, when dcdc_disable_auto_clk_switch is set.</div></li><li><div class="item-name"><a class="mod" href="STS_DC_OK/index.html" title="mod imxrt_ral::dcdc::REG0::STS_DC_OK">STS_<wbr>DC_<wbr>OK</a></div><div class="desc docblock-short">Status register to indicate DCDC status. 1’b1: DCDC already settled 1’b0: DCDC is settling</div></li><li><div class="item-name"><a class="mod" href="XTALOK_DISABLE/index.html" title="mod imxrt_ral::dcdc::REG0::XTALOK_DISABLE">XTALOK_<wbr>DISABLE</a></div><div class="desc docblock-short">1’b1: Disable xtalok detection circuit 1’b0: Enable xtalok detection circuit</div></li><li><div class="item-name"><a class="mod" href="XTAL_24M_OK/index.html" title="mod imxrt_ral::dcdc::REG0::XTAL_24M_OK">XTAL_<wbr>24M_<wbr>OK</a></div><div class="desc docblock-short">set to 1 to switch internal ring osc to xtal 24M</div></li></ul></section></div></main></body></html>
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