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Real-Time Interrupt-driven Concurrency (RTIC) framework for ARM Cortex-M microcontrollers

arm bare-metal concurrency cortex-m microcontroller no-std rust scheduler

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Jorge Aparicio bf17ee7422 pass P0 to init, derive GreaterThanOrEqual for U0		2017-04-14 00:15:49 -05:00
ci	add CI	2017-04-11 23:19:14 -05:00
src	pass P0 to init, derive GreaterThanOrEqual for U0	2017-04-14 00:15:49 -05:00
tests	regression test	2017-04-13 23:31:11 -05:00
.gitignore	compile time verified ceilings	2017-04-09 22:42:17 -05:00
.travis.yml	ci: allow auto and try branches	2017-04-11 23:24:39 -05:00
build.rs	pass P0 to init, derive GreaterThanOrEqual for U0	2017-04-14 00:15:49 -05:00
Cargo.toml	compile time verified ceilings	2017-04-09 22:42:17 -05:00
LICENSE-APACHE	initial commit	2017-03-05 00:29:08 -05:00
LICENSE-MIT	initial commit	2017-03-05 00:29:08 -05:00
README.md	initial commit	2017-03-05 00:29:08 -05:00

README.md

`cortex-m-srp`

License

Licensed under either of

Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)

at your option.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.