mirror of
https://github.com/rtic-rs/rtic.git
synced 2024-11-27 14:04:56 +01:00
612a47ef4d
* rtic-time: Compenstate for timer uncertainty * Update changelog and incorrect cargo.lock in an example * Fix Monotonic impls * Fix tests * Fix other monotonics, again * Update changelog * Fix example * Fix DelayUs and DelayMs impls * Minor coding style fix in u64 conversions * Fix all changelogs * Fix changelog * Fix blocking DelayUs * Minor monotonic rework * Add delay precision test * Add more tests * Add rust-version tags to Cargo.toml * Fix imxrt, rp2040 and systick timer * Fix more monotonics * Fix systick monotonic * Some reverts * Fix imxrt * Fix nrf * Fix rp2040 * Fix stm32 * Fix systick * Fix rtic-time tests * Bump to e-h.rc2 * Apply e-h.rc2 fixes to rtic-time * Apply fixes from arbiter * Fix clippy warning * Minor beautification * Revert previous changes * Fix variable name * Add blocking tests, but disable them by default
409 lines
13 KiB
Rust
409 lines
13 KiB
Rust
//! A Mutex-like FIFO with unlimited-waiter for embedded systems.
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//!
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//! Example usage:
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//!
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//! ```rust
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//! # async fn select<F1, F2>(f1: F1, f2: F2) {}
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//! use rtic_sync::arbiter::Arbiter;
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//!
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//! // Instantiate an Arbiter with a static lifetime.
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//! static ARBITER: Arbiter<u32> = Arbiter::new(32);
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//!
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//! async fn run(){
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//! let write_42 = async move {
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//! *ARBITER.access().await = 42;
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//! };
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//!
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//! let write_1337 = async move {
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//! *ARBITER.access().await = 1337;
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//! };
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//!
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//! // Attempt to access the Arbiter concurrently.
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//! select(write_42, write_1337).await;
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//! }
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//! ```
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use core::cell::UnsafeCell;
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use core::future::poll_fn;
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use core::ops::{Deref, DerefMut};
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use core::pin::Pin;
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use core::task::{Poll, Waker};
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use portable_atomic::{fence, AtomicBool, Ordering};
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use rtic_common::dropper::OnDrop;
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use rtic_common::wait_queue::{Link, WaitQueue};
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/// This is needed to make the async closure in `send` accept that we "share"
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/// the link possible between threads.
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#[derive(Clone)]
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struct LinkPtr(*mut Option<Link<Waker>>);
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impl LinkPtr {
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/// This will dereference the pointer stored within and give out an `&mut`.
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unsafe fn get(&mut self) -> &mut Option<Link<Waker>> {
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&mut *self.0
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}
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}
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unsafe impl Send for LinkPtr {}
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unsafe impl Sync for LinkPtr {}
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/// An FIFO waitqueue for use in shared bus usecases.
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pub struct Arbiter<T> {
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wait_queue: WaitQueue,
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inner: UnsafeCell<T>,
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taken: AtomicBool,
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}
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unsafe impl<T> Send for Arbiter<T> {}
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unsafe impl<T> Sync for Arbiter<T> {}
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impl<T> Arbiter<T> {
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/// Create a new arbiter.
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pub const fn new(inner: T) -> Self {
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Self {
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wait_queue: WaitQueue::new(),
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inner: UnsafeCell::new(inner),
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taken: AtomicBool::new(false),
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}
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}
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/// Get access to the inner value in the [`Arbiter`]. This will wait until access is granted,
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/// for non-blocking access use `try_access`.
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pub async fn access(&self) -> ExclusiveAccess<'_, T> {
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let mut link_ptr: Option<Link<Waker>> = None;
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// Make this future `Drop`-safe.
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// SAFETY(link_ptr): Shadow the original definition of `link_ptr` so we can't abuse it.
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let mut link_ptr = LinkPtr(&mut link_ptr as *mut Option<Link<Waker>>);
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let mut link_ptr2 = link_ptr.clone();
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let dropper = OnDrop::new(|| {
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// SAFETY: We only run this closure and dereference the pointer if we have
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// exited the `poll_fn` below in the `drop(dropper)` call. The other dereference
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// of this pointer is in the `poll_fn`.
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if let Some(link) = unsafe { link_ptr2.get() } {
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link.remove_from_list(&self.wait_queue);
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}
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});
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poll_fn(|cx| {
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critical_section::with(|_| {
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fence(Ordering::SeqCst);
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// The queue is empty and noone has taken the value.
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if self.wait_queue.is_empty() && !self.taken.load(Ordering::Relaxed) {
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self.taken.store(true, Ordering::Relaxed);
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return Poll::Ready(());
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}
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// SAFETY: This pointer is only dereferenced here and on drop of the future
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// which happens outside this `poll_fn`'s stack frame.
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let link = unsafe { link_ptr.get() };
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if let Some(link) = link {
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if link.is_popped() {
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return Poll::Ready(());
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}
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} else {
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// Place the link in the wait queue on first run.
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let link_ref = link.insert(Link::new(cx.waker().clone()));
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// SAFETY(new_unchecked): The address to the link is stable as it is defined
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// outside this stack frame.
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// SAFETY(push): `link_ref` lifetime comes from `link_ptr` that is shadowed,
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// and we make sure in `dropper` that the link is removed from the queue
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// before dropping `link_ptr` AND `dropper` makes sure that the shadowed
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// `link_ptr` lives until the end of the stack frame.
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unsafe { self.wait_queue.push(Pin::new_unchecked(link_ref)) };
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}
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Poll::Pending
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})
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})
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.await;
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// Make sure the link is removed from the queue.
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drop(dropper);
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// SAFETY: One only gets here if there is exlusive access.
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ExclusiveAccess {
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arbiter: self,
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inner: unsafe { &mut *self.inner.get() },
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}
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}
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/// Non-blockingly tries to access the underlying value.
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/// If someone is in queue to get it, this will return `None`.
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pub fn try_access(&self) -> Option<ExclusiveAccess<'_, T>> {
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critical_section::with(|_| {
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fence(Ordering::SeqCst);
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// The queue is empty and noone has taken the value.
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if self.wait_queue.is_empty() && !self.taken.load(Ordering::Relaxed) {
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self.taken.store(true, Ordering::Relaxed);
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// SAFETY: One only gets here if there is exlusive access.
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Some(ExclusiveAccess {
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arbiter: self,
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inner: unsafe { &mut *self.inner.get() },
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})
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} else {
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None
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}
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})
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}
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}
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/// This token represents exclusive access to the value protected by the [`Arbiter`].
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pub struct ExclusiveAccess<'a, T> {
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arbiter: &'a Arbiter<T>,
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inner: &'a mut T,
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}
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impl<'a, T> Drop for ExclusiveAccess<'a, T> {
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fn drop(&mut self) {
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critical_section::with(|_| {
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fence(Ordering::SeqCst);
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if self.arbiter.wait_queue.is_empty() {
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// If noone is in queue and we release exclusive access, reset `taken`.
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self.arbiter.taken.store(false, Ordering::Relaxed);
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} else if let Some(next) = self.arbiter.wait_queue.pop() {
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// Wake the next one in queue.
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next.wake();
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}
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})
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}
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}
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impl<'a, T> Deref for ExclusiveAccess<'a, T> {
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type Target = T;
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fn deref(&self) -> &Self::Target {
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self.inner
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}
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}
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impl<'a, T> DerefMut for ExclusiveAccess<'a, T> {
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fn deref_mut(&mut self) -> &mut Self::Target {
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self.inner
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}
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}
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#[cfg(feature = "unstable")]
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/// SPI bus sharing using [`Arbiter`]
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pub mod spi {
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use super::Arbiter;
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use embedded_hal::digital::OutputPin;
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use embedded_hal_async::{
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delay::DelayNs,
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spi::{ErrorType, Operation, SpiBus, SpiDevice},
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};
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use embedded_hal_bus::spi::DeviceError;
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/// [`Arbiter`]-based shared bus implementation.
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pub struct ArbiterDevice<'a, BUS, CS, D> {
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bus: &'a Arbiter<BUS>,
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cs: CS,
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delay: D,
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}
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impl<'a, BUS, CS, D> ArbiterDevice<'a, BUS, CS, D> {
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/// Create a new [`ArbiterDevice`].
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pub fn new(bus: &'a Arbiter<BUS>, cs: CS, delay: D) -> Self {
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Self { bus, cs, delay }
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}
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}
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impl<'a, BUS, CS, D> ErrorType for ArbiterDevice<'a, BUS, CS, D>
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where
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BUS: ErrorType,
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CS: OutputPin,
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{
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type Error = DeviceError<BUS::Error, CS::Error>;
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}
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impl<'a, Word, BUS, CS, D> SpiDevice<Word> for ArbiterDevice<'a, BUS, CS, D>
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where
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Word: Copy + 'static,
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BUS: SpiBus<Word>,
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CS: OutputPin,
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D: DelayNs,
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{
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async fn transaction(
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&mut self,
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operations: &mut [Operation<'_, Word>],
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) -> Result<(), DeviceError<BUS::Error, CS::Error>> {
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let mut bus = self.bus.access().await;
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self.cs.set_low().map_err(DeviceError::Cs)?;
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let op_res = 'ops: {
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for op in operations {
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let res = match op {
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Operation::Read(buf) => bus.read(buf).await,
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Operation::Write(buf) => bus.write(buf).await,
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Operation::Transfer(read, write) => bus.transfer(read, write).await,
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Operation::TransferInPlace(buf) => bus.transfer_in_place(buf).await,
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Operation::DelayNs(ns) => match bus.flush().await {
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Err(e) => Err(e),
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Ok(()) => {
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self.delay.delay_ns(*ns).await;
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Ok(())
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}
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},
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};
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if let Err(e) = res {
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break 'ops Err(e);
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}
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}
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Ok(())
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};
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// On failure, it's important to still flush and deassert CS.
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let flush_res = bus.flush().await;
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let cs_res = self.cs.set_high();
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op_res.map_err(DeviceError::Spi)?;
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flush_res.map_err(DeviceError::Spi)?;
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cs_res.map_err(DeviceError::Cs)?;
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Ok(())
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}
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}
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}
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#[cfg(feature = "unstable")]
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/// I2C bus sharing using [`Arbiter`]
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///
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/// An Example how to use it in RTIC application:
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/// ```ignore
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/// #[app(device = some_hal, peripherals = true, dispatchers = [TIM16])]
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/// mod app {
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/// use core::mem::MaybeUninit;
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/// use rtic_sync::{arbiter::{i2c::ArbiterDevice, Arbiter},
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///
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/// #[shared]
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/// struct Shared {}
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///
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/// #[local]
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/// struct Local {
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/// ens160: Ens160<ArbiterDevice<'static, I2c<'static, I2C1>>>,
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/// }
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///
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/// #[init(local = [
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/// i2c_arbiter: MaybeUninit<Arbiter<I2c<'static, I2C1>>> = MaybeUninit::uninit(),
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/// ])]
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/// fn init(cx: init::Context) -> (Shared, Local) {
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/// let i2c = I2c::new(cx.device.I2C1);
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/// let i2c_arbiter = cx.local.i2c_arbiter.write(Arbiter::new(i2c));
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/// let ens160 = Ens160::new(ArbiterDevice::new(i2c_arbiter), 0x52);
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///
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/// i2c_sensors::spawn(i2c_arbiter).ok();
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///
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/// (Shared {}, Local { ens160 })
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/// }
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///
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/// #[task(local = [ens160])]
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/// async fn i2c_sensors(cx: i2c_sensors::Context, i2c: &'static Arbiter<I2c<'static, I2C1>>) {
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/// use sensor::Asensor;
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///
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/// loop {
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/// // Use scope to make sure I2C access is dropped.
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/// {
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/// // Read from sensor driver that wants to use I2C directly.
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/// let mut i2c = i2c.access().await;
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/// let status = Asensor::status(&mut i2c).await;
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/// }
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///
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/// // Read ENS160 sensor.
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/// let eco2 = cx.local.ens160.eco2().await;
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/// }
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/// }
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/// }
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/// ```
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pub mod i2c {
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use super::Arbiter;
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use embedded_hal::i2c::{AddressMode, ErrorType, Operation};
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use embedded_hal_async::i2c::I2c;
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/// [`Arbiter`]-based shared bus implementation for I2C.
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pub struct ArbiterDevice<'a, BUS> {
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bus: &'a Arbiter<BUS>,
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}
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impl<'a, BUS> ArbiterDevice<'a, BUS> {
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/// Create a new [`ArbiterDevice`] for I2C.
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pub fn new(bus: &'a Arbiter<BUS>) -> Self {
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Self { bus }
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}
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}
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impl<'a, BUS> ErrorType for ArbiterDevice<'a, BUS>
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where
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BUS: ErrorType,
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{
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type Error = BUS::Error;
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}
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impl<'a, BUS, A> I2c<A> for ArbiterDevice<'a, BUS>
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where
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BUS: I2c<A>,
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A: AddressMode,
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{
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async fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error> {
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let mut bus = self.bus.access().await;
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bus.read(address, read).await
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}
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async fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> {
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let mut bus = self.bus.access().await;
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bus.write(address, write).await
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}
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async fn write_read(
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&mut self,
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address: A,
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write: &[u8],
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read: &mut [u8],
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) -> Result<(), Self::Error> {
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let mut bus = self.bus.access().await;
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bus.write_read(address, write, read).await
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}
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async fn transaction(
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&mut self,
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address: A,
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operations: &mut [Operation<'_>],
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) -> Result<(), Self::Error> {
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let mut bus = self.bus.access().await;
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bus.transaction(address, operations).await
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}
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}
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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#[tokio::test]
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async fn stress_channel() {
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const NUM_RUNS: usize = 100_000;
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static ARB: Arbiter<usize> = Arbiter::new(0);
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let mut v = std::vec::Vec::new();
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for _ in 0..NUM_RUNS {
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v.push(tokio::spawn(async move {
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*ARB.access().await += 1;
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}));
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}
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for v in v {
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v.await.unwrap();
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}
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assert_eq!(*ARB.access().await, NUM_RUNS)
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}
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}
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