rtic/rtic-monotonics
Finomnis 3dfef74a4c
[monotonics] Fix STM32 read-modify-write race condition (#984)
* Fix stm32 read-modify-write problem

The `SR` register for STM32 clears when writing a zero to a bit.
Therefore, all registers that should not be cleared need to be `1`.

`modify` here caused a read-modify-write error that could clear
unrelated flags.

* Add changelog

* Make initialization more deterministic

* Update changelog

* Beautification in comments

---------

Co-authored-by: Martin Stumpf <martin.stumpf@vected.de>
2024-10-23 19:28:42 +00:00
..
src [monotonics] Fix STM32 read-modify-write race condition (#984) 2024-10-23 19:28:42 +00:00
.gitignore Add rtic-timer (timerqueue + monotonic) and rtic-monotonics (systick-monotonic) 2023-03-01 00:33:31 +01:00
build.rs Fix CI with 1.80 2024-08-07 21:09:58 +02:00
Cargo.toml Update riscv requirement from 0.11.0 to 0.12.1 (#982) 2024-10-23 18:15:06 +00:00
CHANGELOG.md [monotonics] Fix STM32 read-modify-write race condition (#984) 2024-10-23 19:28:42 +00:00