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680: Update cortex-m-semihosting requirement from 0.3.3 to 0.5.0 r=AfoHT a=dependabot[bot] Updates the requirements on [cortex-m-semihosting](https://github.com/rust-embedded/cortex-m) to permit the latest version. <details> <summary>Changelog</summary> <p><em>Sourced from <a href="https://github.com/rust-embedded/cortex-m/blob/master/CHANGELOG.md">cortex-m-semihosting's changelog</a>.</em></p> <blockquote> <h2>[v0.5.0] - 2018-05-11</h2> <h3>Added</h3> <ul> <li> <p><code>DebugMonitor</code> and <code>SecureFault</code> variants to the <code>Exception</code> enumeration.</p> </li> <li> <p>An optional <code>"inline-asm"</code> feature</p> </li> </ul> <h3>Changed</h3> <ul> <li> <p>[breaking-change] This crate now requires <code>arm-none-eabi-gcc</code> to be installed and available in <code>$PATH</code> when built with the <code>"inline-asm"</code> feature disabled (which is disabled by default).</p> </li> <li> <p>[breaking-change] The <code>register::{apsr,lr,pc}</code> modules are now behind the <code>"inline-asm"</code> feature.</p> </li> <li> <p>[breaking-change] Some variants of the <code>Exception</code> enumeration are no longer available on <code>thumbv6m-none-eabi</code>. See API docs for details.</p> </li> <li> <p>[breaking-change] Several of the variants of the <code>Exception</code> enumeration have been renamed to match the CMSIS specification.</p> </li> <li> <p>[breaking-change] fixed typo in <code>shcrs</code> field of <code>scb::RegisterBlock</code>; it was previously named <code>shpcrs</code>.</p> </li> <li> <p>[breaking-change] removed several fields from <code>scb::RegisterBlock</code> on ARMv6-M. These registers are not available on that sub-architecture.</p> </li> <li> <p>[breaking-change] changed the type of <code>scb::RegisterBlock.shpr</code> from <code>RW<u8></code> to <code>RW<u32></code> on ARMv6-M. These registers are word accessible only on that sub-architecture.</p> </li> <li> <p>[breaking-change] renamed the <code>mmar</code> field of <code>scb::RegisterBlock</code> to <code>mmfar</code> to match the CMSIS name.</p> </li> <li> <p>[breaking-change] removed the <code>iabr</code> field from <code>scb::RegisterBlock</code> on ARMv6-M. This register is not available on that sub-architecture.</p> </li> <li> <p>[breaking-change] removed several fields from <code>cpuid::RegisterBlock</code> on ARMv6-M. These registers are not available on that sub-architecture.</p> </li> <li> <p>[breaking-change] The <code>Mutex.new</code> constructor is not a <code>const fn</code> by default. To make it a <code>const fn</code> you have to opt into the <code>"const-fn"</code> feature, which was added in v0.5.1, and switch to a nightly compiler.</p> </li> </ul> <h3>Removed</h3> <ul> <li>[breaking-change] The <code>exception</code> module has been removed. A replacement for <code>Exception::active</code> can be found in <code>SCB::vect_active</code>. A modified version <code>exception::Exception</code> can be found in the <code>peripheral::scb</code> module.</li> </ul> <h2>[v0.4.3] - 2018-01-25</h2> <!-- raw HTML omitted --> </blockquote> <p>... (truncated)</p> </details> <details> <summary>Commits</summary> <ul> <li><a href="a448e9156e"><code>a448e91</code></a> v0.5.0</li> <li><a href="e3217ad94d"><code>e3217ad</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m/issues/88">#88</a></li> <li><a href="05bbc3b815"><code>05bbc3b</code></a> always list all the peripherals in <code>Peripherals</code></li> <li><a href="550f94902f"><code>550f949</code></a> fix build for ARMv7E-M + "inline-asm"</li> <li><a href="7d51707b5f"><code>7d51707</code></a> simplify #[cfg]s</li> <li><a href="2cd6092848"><code>2cd6092</code></a> ARMv6-M: remove fields that are not available from cpuid::RegisterBlock</li> <li><a href="17bd0c8e88"><code>17bd0c8</code></a> fix x86_64 tests</li> <li><a href="c290aa4ee8"><code>c290aa4</code></a> ARMv6-M: remove fields that are not available from NVIC and SCB</li> <li><a href="716398ce54"><code>716398c</code></a> fix build on ARMv6-M</li> <li><a href="1d68643772"><code>1d68643</code></a> fix build on ARMv7E-M</li> <li>Additional commits viewable in <a href="https://github.com/rust-embedded/cortex-m/compare/c-m-sh-v0.3.5...v0.5.0">compare view</a></li> </ul> </details> <br /> Dependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting ``@dependabot` rebase`. [//]: # (dependabot-automerge-start) [//]: # (dependabot-automerge-end) --- <details> <summary>Dependabot commands and options</summary> <br /> You can trigger Dependabot actions by commenting on this PR: - ``@dependabot` rebase` will rebase this PR - ``@dependabot` recreate` will recreate this PR, overwriting any edits that have been made to it - ``@dependabot` merge` will merge this PR after your CI passes on it - ``@dependabot` squash and merge` will squash and merge this PR after your CI passes on it - ``@dependabot` cancel merge` will cancel a previously requested merge and block automerging - ``@dependabot` reopen` will reopen this PR if it is closed - ``@dependabot` close` will close this PR and stop Dependabot recreating it. You can achieve the same result by closing it manually - ``@dependabot` ignore this major version` will close this PR and stop Dependabot creating any more for this major version (unless you reopen the PR or upgrade to it yourself) - ``@dependabot` ignore this minor version` will close this PR and stop Dependabot creating any more for this minor version (unless you reopen the PR or upgrade to it yourself) - ``@dependabot` ignore this dependency` will close this PR and stop Dependabot creating any more for this dependency (unless you reopen the PR or upgrade to it yourself) </details> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> Co-authored-by: Henrik Tjäder <henrik@tjaders.com>
79 lines
1.6 KiB
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79 lines
1.6 KiB
TOML
[package]
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authors = [
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"The Real-Time Interrupt-driven Concurrency developers",
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"Jorge Aparicio <jorge@japaric.io>",
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"Per Lindgren <per.lindgren@ltu.se>",
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]
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categories = ["concurrency", "embedded", "no-std"]
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description = "Real-Time Interrupt-driven Concurrency (RTIC): a concurrency framework for building real-time systems"
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documentation = "https://rtic.rs/"
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edition = "2021"
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keywords = ["arm", "cortex-m"]
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license = "MIT OR Apache-2.0"
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name = "cortex-m-rtic"
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readme = "README.md"
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repository = "https://github.com/rtic-rs/cortex-m-rtic"
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version = "1.1.3"
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[lib]
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name = "rtic"
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[dependencies]
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cortex-m = "0.7.0"
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cortex-m-rtic-macros = { path = "macros", version = "1.1.5" }
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rtic-monotonic = "1.0.0"
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rtic-core = "1.0.0"
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heapless = "0.7.7"
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bare-metal = "1.0.0"
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[build-dependencies]
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version_check = "0.9"
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[dev-dependencies]
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lm3s6965 = "0.1.3"
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cortex-m-semihosting = "0.5.0"
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systick-monotonic = "1.0.0"
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[dev-dependencies.panic-semihosting]
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features = ["exit"]
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version = "0.6.0"
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[target.x86_64-unknown-linux-gnu.dev-dependencies]
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trybuild = "1"
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[profile.release]
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codegen-units = 1
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lto = true
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[workspace]
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members = [
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"macros",
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"xtask",
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]
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# do not optimize proc-macro deps or build scripts
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[profile.dev.build-override]
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codegen-units = 16
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debug = false
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debug-assertions = false
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opt-level = 0
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overflow-checks = false
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[profile.release.build-override]
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codegen-units = 16
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debug = false
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debug-assertions = false
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opt-level = 0
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overflow-checks = false
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[patch.crates-io]
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lm3s6965 = { git = "https://github.com/japaric/lm3s6965" }
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[features]
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test-critical-section = ["cortex-m/critical-section-single-core"]
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[[example]]
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name = "pool"
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required-features = ["test-critical-section"]
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