rtic/dev/api/imxrt_ral/iomuxc/sidebar-items.js

window.SIDEBAR_ITEMS = {"constant":["IOMUXC"],"fn":["number"],"mod":["FLEXPWM1_PWMA_SELECT_INPUT_0","FLEXPWM1_PWMA_SELECT_INPUT_1","FLEXPWM1_PWMA_SELECT_INPUT_2","FLEXPWM1_PWMA_SELECT_INPUT_3","FLEXPWM1_PWMB_SELECT_INPUT_0","FLEXPWM1_PWMB_SELECT_INPUT_1","FLEXPWM1_PWMB_SELECT_INPUT_2","FLEXPWM1_PWMB_SELECT_INPUT_3","FLEXSPI_DQS_FA_SELECT_INPUT","FLEXSPI_DQS_FB_SELECT_INPUT","KPP_COL_SELECT_INPUT_0","KPP_COL_SELECT_INPUT_1","KPP_COL_SELECT_INPUT_2","KPP_COL_SELECT_INPUT_3","KPP_ROW_SELECT_INPUT_0","KPP_ROW_SELECT_INPUT_1","KPP_ROW_SELECT_INPUT_2","KPP_ROW_SELECT_INPUT_3","LPI2C1_HREQ_SELECT_INPUT","LPI2C1_SCL_SELECT_INPUT","LPI2C1_SDA_SELECT_INPUT","LPI2C2_SCL_SELECT_INPUT","LPI2C2_SDA_SELECT_INPUT","LPSPI1_PCS_SELECT_INPUT_0","LPSPI1_SCK_SELECT_INPUT","LPSPI1_SDI_SELECT_INPUT","LPSPI1_SDO_SELECT_INPUT","LPSPI2_PCS_SELECT_INPUT_0","LPSPI2_SCK_SELECT_INPUT","LPSPI2_SDI_SELECT_INPUT","LPSPI2_SDO_SELECT_INPUT","LPUART1_RXD_SELECT_INPUT","LPUART1_TXD_SELECT_INPUT","LPUART2_RXD_SELECT_INPUT","LPUART2_TXD_SELECT_INPUT","LPUART3_RXD_SELECT_INPUT","LPUART3_TXD_SELECT_INPUT","LPUART4_RXD_SELECT_INPUT","LPUART4_TXD_SELECT_INPUT","NMI_GLUE_NMI_SELECT_INPUT","SPDIF_IN1_SELECT_INPUT","SPDIF_TX_CLK2_SELECT_INPUT","SW_MUX_CTL_PAD_GPIO_00","SW_MUX_CTL_PAD_GPIO_01","SW_MUX_CTL_PAD_GPIO_02","SW_MUX_CTL_PAD_GPIO_03","SW_MUX_CTL_PAD_GPIO_04","SW_MUX_CTL_PAD_GPIO_05","SW_MUX_CTL_PAD_GPIO_06","SW_MUX_CTL_PAD_GPIO_07","SW_MUX_CTL_PAD_GPIO_08","SW_MUX_CTL_PAD_GPIO_09","SW_MUX_CTL_PAD_GPIO_10","SW_MUX_CTL_PAD_GPIO_11","SW_MUX_CTL_PAD_GPIO_12","SW_MUX_CTL_PAD_GPIO_13","SW_MUX_CTL_PAD_GPIO_AD_00","SW_MUX_CTL_PAD_GPIO_AD_01","SW_MUX_CTL_PAD_GPIO_AD_02","SW_MUX_CTL_PAD_GPIO_AD_03","SW_MUX_CTL_PAD_GPIO_AD_04","SW_MUX_CTL_PAD_GPIO_AD_05","SW_MUX_CTL_PAD_GPIO_AD_06","SW_MUX_CTL_PAD_GPIO_AD_07","SW_MUX_CTL_PAD_GPIO_AD_08","SW_MUX_CTL_PAD_GPIO_AD_09","SW_MUX_CTL_PAD_GPIO_AD_10","SW_MUX_CTL_PAD_GPIO_AD_11","SW_MUX_CTL_PAD_GPIO_AD_12","SW_MUX_CTL_PAD_GPIO_AD_13","SW_MUX_CTL_PAD_GPIO_AD_14","SW_MUX_CTL_PAD_GPIO_SD_00","SW_MUX_CTL_PAD_GPIO_SD_01","SW_MUX_CTL_PAD_GPIO_SD_02","SW_MUX_CTL_PAD_GPIO_SD_03","SW_MUX_CTL_PAD_GPIO_SD_04","SW_MUX_CTL_PAD_GPIO_SD_05","SW_MUX_CTL_PAD_GPIO_SD_06","SW_MUX_CTL_PAD_GPIO_SD_07","SW_MUX_CTL_PAD_GPIO_SD_08","SW_MUX_CTL_PAD_GPIO_SD_09","SW_MUX_CTL_PAD_GPIO_SD_10","SW_MUX_CTL_PAD_GPIO_SD_11","SW_MUX_CTL_PAD_GPIO_SD_12","SW_MUX_CTL_PAD_GPIO_SD_13","SW_MUX_CTL_PAD_GPIO_SD_14","SW_PAD_CTL_PAD_GPIO_00","SW_PAD_CTL_PAD_GPIO_01","SW_PAD_CTL_PAD_GPIO_02","SW_PAD_CTL_PAD_GPIO_03","SW_PAD_CTL_PAD_GPIO_04","SW_PAD_CTL_PAD_GPIO_05","SW_PAD_CTL_PAD_GPIO_06","SW_PAD_CTL_PAD_GPIO_07","SW_PAD_CTL_PAD_GPIO_08","SW_PAD_CTL_PAD_GPIO_09","SW_PAD_CTL_PAD_GPIO_10","SW_PAD_CTL_PAD_GPIO_11","SW_PAD_CTL_PAD_GPIO_12","SW_PAD_CTL_PAD_GPIO_13","SW_PAD_CTL_PAD_GPIO_AD_00","SW_PAD_CTL_PAD_GPIO_AD_01","SW_PAD_CTL_PAD_GPIO_AD_02","SW_PAD_CTL_PAD_GPIO_AD_03","SW_PAD_CTL_PAD_GPIO_AD_04","SW_PAD_CTL_PAD_GPIO_AD_05","SW_PAD_CTL_PAD_GPIO_AD_06","SW_PAD_CTL_PAD_GPIO_AD_07","SW_PAD_CTL_PAD_GPIO_AD_08","SW_PAD_CTL_PAD_GPIO_AD_09","SW_PAD_CTL_PAD_GPIO_AD_10","SW_PAD_CTL_PAD_GPIO_AD_11","SW_PAD_CTL_PAD_GPIO_AD_12","SW_PAD_CTL_PAD_GPIO_AD_13","SW_PAD_CTL_PAD_GPIO_AD_14","SW_PAD_CTL_PAD_GPIO_SD_00","SW_PAD_CTL_PAD_GPIO_SD_01","SW_PAD_CTL_PAD_GPIO_SD_02","SW_PAD_CTL_PAD_GPIO_SD_03","SW_PAD_CTL_PAD_GPIO_SD_04","SW_PAD_CTL_PAD_GPIO_SD_05","SW_PAD_CTL_PAD_GPIO_SD_06","SW_PAD_CTL_PAD_GPIO_SD_07","SW_PAD_CTL_PAD_GPIO_SD_08","SW_PAD_CTL_PAD_GPIO_SD_09","SW_PAD_CTL_PAD_GPIO_SD_10","SW_PAD_CTL_PAD_GPIO_SD_11","SW_PAD_CTL_PAD_GPIO_SD_12","SW_PAD_CTL_PAD_GPIO_SD_13","SW_PAD_CTL_PAD_GPIO_SD_14","USB_OTG_ID_SELECT_INPUT","USB_OTG_OC_SELECT_INPUT","XEV_GLUE_RXEV_SELECT_INPUT"],"struct":["RegisterBlock"],"type":["IOMUXC","Instance"]};