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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="List of all items in this crate"><title>List of all items in this crate</title><script>if(window.location.protocol!=="file:")document.head.insertAdjacentHTML("beforeend","SourceSerif4-Regular-46f98efaafac5295.ttf.woff2,FiraSans-Regular-018c141bf0843ffd.woff2,FiraSans-Medium-8f9a781e4970d388.woff2,SourceCodePro-Regular-562dcc5011b6de7d.ttf.woff2,SourceCodePro-Semibold-d899c5a5c4aeb14a.ttf.woff2".split(",").map(f=>`<link rel="preload" as="font" type="font/woff2" crossorigin href="../static.files/${f}">`).join(""))</script><link rel="stylesheet" href="../static.files/normalize-76eba96aa4d2e634.css"><link rel="stylesheet" href="../static.files/rustdoc-b0742ba02757f159.css"><meta name="rustdoc-vars" data-root-path="../" data-static-root-path="../static.files/" data-current-crate="stm32_metapac" data-themes="" data-resource-suffix="" data-rustdoc-version="1.83.0 (90b35a623 2024-11-26)" data-channel="1.83.0" data-search-js="search-f0d225181b97f9a4.js" data-settings-js="settings-805db61a62df4bd2.js" ><script src="../static.files/storage-1d39b6787ed640ff.js"></script><script defer src="../static.files/main-f070b9041d14864c.js"></script><noscript><link rel="stylesheet" href="../static.files/noscript-0111fcff984fae8f.css"></noscript><link rel="alternate icon" type="image/png" href="../static.files/favicon-32x32-422f7d1d52889060.png"><link rel="icon" type="image/svg+xml" href="../static.files/favicon-2c020d218678b618.svg"></head><body class="rustdoc mod sys"><!--[if lte IE 11]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="mobile-topbar"><button class="sidebar-menu-toggle" title="show sidebar"></button></nav><nav class="sidebar"><div class="sidebar-crate"><h2><a href="../stm32_metapac/index.html">stm32_<wbr>metapac</a><span class="version">15.0.0</span></h2></div><div class="sidebar-elems"><section id="rustdoc-toc"><h3><a href="#structs">Crate Items</a></h3><ul class="block"><li><a href="#structs" title="Structs">Structs</a></li><li><a href="#enums" title="Enums">Enums</a></li><li><a href="#constants" title="Constants">Constants</a></li><li><a href="#traits" title="Traits">Traits</a></li><li><a href="#functions" title="Functions">Functions</a></li></ul></section><div id="rustdoc-modnav"></div></div></nav><div class="sidebar-resizer"></div><main><div class="width-limiter"><rustdoc-search></rustdoc-search><section id="main-content" class="content"><h1>List of all items</h1><h3 id="structs">Structs</h3><ul class="all-items"><li><a href="adc/struct.Adc.html">adc::Adc</a></li><li><a href="adc/regs/struct.Awd2cr.html">adc::regs::Awd2cr</a></li><li><a href="adc/regs/struct.Awd3cr.html">adc::regs::Awd3cr</a></li><li><a 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href="eth/regs/struct.Macl3a10r.html">eth::regs::Macl3a10r</a></li><li><a href="eth/regs/struct.Macl3a11r.html">eth::regs::Macl3a11r</a></li><li><a href="eth/regs/struct.Macl3a20.html">eth::regs::Macl3a20</a></li><li><a href="eth/regs/struct.Macl3a21r.html">eth::regs::Macl3a21r</a></li><li><a href="eth/regs/struct.Macl3a30.html">eth::regs::Macl3a30</a></li><li><a href="eth/regs/struct.Macl3a31r.html">eth::regs::Macl3a31r</a></li><li><a href="eth/regs/struct.Macl3l4c0r.html">eth::regs::Macl3l4c0r</a></li><li><a href="eth/regs/struct.Macl3l4c1r.html">eth::regs::Macl3l4c1r</a></li><li><a href="eth/regs/struct.Macl4a0r.html">eth::regs::Macl4a0r</a></li><li><a href="eth/regs/struct.Macl4a1r.html">eth::regs::Macl4a1r</a></li><li><a href="eth/regs/struct.Maclcsr.html">eth::regs::Maclcsr</a></li><li><a href="eth/regs/struct.Macletr.html">eth::regs::Macletr</a></li><li><a href="eth/regs/struct.Maclmir.html">eth::regs::Maclmir</a></li><li><a href="eth/regs/struct.Macltcr.html">eth::regs::Macltcr</a></li><li><a href="eth/regs/struct.Macmdioar.html">eth::regs::Macmdioar</a></li><li><a href="eth/regs/struct.Macmdiodr.html">eth::regs::Macmdiodr</a></li><li><a href="eth/regs/struct.Macpcsr.html">eth::regs::Macpcsr</a></li><li><a href="eth/regs/struct.Macpfr.html">eth::regs::Macpfr</a></li><li><a href="eth/regs/struct.Macpocr.html">eth::regs::Macpocr</a></li><li><a href="eth/regs/struct.Macppscr.html">eth::regs::Macppscr</a></li><li><a href="eth/regs/struct.Macppsir.html">eth::regs::Macppsir</a></li><li><a href="eth/regs/struct.Macppsttnr.html">eth::regs::Macppsttnr</a></li><li><a href="eth/regs/struct.Macppsttsr.html">eth::regs::Macppsttsr</a></li><li><a href="eth/regs/struct.Macppswr.html">eth::regs::Macppswr</a></li><li><a href="eth/regs/struct.MacqtxFcr.html">eth::regs::MacqtxFcr</a></li><li><a href="eth/regs/struct.Macrwkpfr.html">eth::regs::Macrwkpfr</a></li><li><a href="eth/regs/struct.MacrxFcr.html">eth::regs::MacrxFcr</a></li><li><a href="eth/regs/struct.MacrxTxSr.html">eth::regs::MacrxTxSr</a></li><li><a href="eth/regs/struct.Macspi0r.html">eth::regs::Macspi0r</a></li><li><a href="eth/regs/struct.Macspi1r.html">eth::regs::Macspi1r</a></li><li><a href="eth/regs/struct.Macspi2r.html">eth::regs::Macspi2r</a></li><li><a href="eth/regs/struct.Macssir.html">eth::regs::Macssir</a></li><li><a href="eth/regs/struct.Macstnr.html">eth::regs::Macstnr</a></li><li><a href="eth/regs/struct.Macstnur.html">eth::regs::Macstnur</a></li><li><a href="eth/regs/struct.Macstsr.html">eth::regs::Macstsr</a></li><li><a href="eth/regs/struct.Macstsur.html">eth::regs::Macstsur</a></li><li><a href="eth/regs/struct.Mactsar.html">eth::regs::Mactsar</a></li><li><a href="eth/regs/struct.Mactscr.html">eth::regs::Mactscr</a></li><li><a href="eth/regs/struct.Mactseacr.html">eth::regs::Mactseacr</a></li><li><a href="eth/regs/struct.Mactsecnr.html">eth::regs::Mactsecnr</a></li><li><a href="eth/regs/struct.Mactsiacr.html">eth::regs::Mactsiacr</a></li><li><a href="eth/regs/struct.Mactsicnr.html">eth::regs::Mactsicnr</a></li><li><a href="eth/regs/struct.Mactssr.html">eth::regs::Mactssr</a></li><li><a href="eth/regs/struct.MactxTssnr.html">eth::regs::MactxTssnr</a></li><li><a href="eth/regs/struct.MactxTsssr.html">eth::regs::MactxTsssr</a></li><li><a href="eth/regs/struct.Macvhtr.html">eth::regs::Macvhtr</a></li><li><a href="eth/regs/struct.Macvir.html">eth::regs::Macvir</a></li><li><a href="eth/regs/struct.Macvr.html">eth::regs::Macvr</a></li><li><a href="eth/regs/struct.Macvtr.html">eth::regs::Macvtr</a></li><li><a href="eth/regs/struct.Macwtr.html">eth::regs::Macwtr</a></li><li><a href="eth/regs/struct.MmcControl.html">eth::regs::MmcControl</a></li><li><a href="eth/regs/struct.MmcRxInterrupt.html">eth::regs::MmcRxInterrupt</a></li><li><a href="eth/regs/struct.MmcRxInterruptMask.html">eth::regs::MmcRxInterruptMask</a></li><li><a href="eth/regs/struct.MmcTxInterrupt.html">eth::regs::MmcTxInterrupt</a></li><li><a href="eth/regs/struct.MmcTxInterruptMask.html">eth::regs::MmcTxInterruptMask</a></li><li><a href="eth/regs/struct.Mtlisr.html">eth::regs::Mtlisr</a></li><li><a href="eth/regs/struct.Mtlomr.html">eth::regs::Mtlomr</a></li><li><a href="eth/regs/struct.Mtlqicsr.html">eth::regs::Mtlqicsr</a></li><li><a href="eth/regs/struct.MtlrxQdr.html">eth::regs::MtlrxQdr</a></li><li><a href="eth/regs/struct.MtlrxQmpocr.html">eth::regs::MtlrxQmpocr</a></li><li><a href="eth/regs/struct.MtlrxQomr.html">eth::regs::MtlrxQomr</a></li><li><a href="eth/regs/struct.MtltxQdr.html">eth::regs::MtltxQdr</a></li><li><a href="eth/regs/struct.MtltxQomr.html">eth::regs::MtltxQomr</a></li><li><a href="eth/regs/struct.MtltxQur.html">eth::regs::MtltxQur</a></li><li><a href="eth/regs/struct.RxAlignmentErrorPackets.html">eth::regs::RxAlignmentErrorPackets</a></li><li><a href="eth/regs/struct.RxCrcErrorPackets.html">eth::regs::RxCrcErrorPackets</a></li><li><a href="eth/regs/struct.RxLpiTranCntr.html">eth::regs::RxLpiTranCntr</a></li><li><a href="eth/regs/struct.RxLpiUsecCntr.html">eth::regs::RxLpiUsecCntr</a></li><li><a href="eth/regs/struct.RxUnicastPacketsGood.html">eth::regs::RxUnicastPacketsGood</a></li><li><a href="eth/regs/struct.TxLpiTranCntr.html">eth::regs::TxLpiTranCntr</a></li><li><a href="eth/regs/struct.TxLpiUsecCntr.html">eth::regs::TxLpiUsecCntr</a></li><li><a href="eth/regs/struct.TxMultipleCollisionGoodPackets.html">eth::regs::TxMultipleCollisionGoodPackets</a></li><li><a href="eth/regs/struct.TxPacketCountGood.html">eth::regs::TxPacketCountGood</a></li><li><a href="eth/regs/struct.TxSingleCollisionGoodPackets.html">eth::regs::TxSingleCollisionGoodPackets</a></li><li><a href="exti/struct.Exti.html">exti::Exti</a></li><li><a href="exti/regs/struct.Lines.html">exti::regs::Lines</a></li><li><a href="fdcanram/struct.Fdcanram.html">fdcanram::Fdcanram</a></li><li><a href="flash/struct.Bank.html">flash::Bank</a></li><li><a href="flash/struct.Flash.html">flash::Flash</a></li><li><a href="flash/regs/struct.Acr.html">flash::regs::Acr</a></li><li><a href="flash/regs/struct.BootCurr.html">flash::regs::BootCurr</a></li><li><a href="flash/regs/struct.BootPrgr.html">flash::regs::BootPrgr</a></li><li><a href="flash/regs/struct.Ccr.html">flash::regs::Ccr</a></li><li><a href="flash/regs/struct.Cr.html">flash::regs::Cr</a></li><li><a href="flash/regs/struct.Crccr.html">flash::regs::Crccr</a></li><li><a href="flash/regs/struct.Crcdatar.html">flash::regs::Crcdatar</a></li><li><a href="flash/regs/struct.Crceaddr.html">flash::regs::Crceaddr</a></li><li><a href="flash/regs/struct.Crcsaddr.html">flash::regs::Crcsaddr</a></li><li><a href="flash/regs/struct.Far.html">flash::regs::Far</a></li><li><a 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href="fmac/regs/struct.Rdata.html">fmac::regs::Rdata</a></li><li><a href="fmac/regs/struct.Sr.html">fmac::regs::Sr</a></li><li><a href="fmac/regs/struct.Wdata.html">fmac::regs::Wdata</a></li><li><a href="fmac/regs/struct.X1bufcfg.html">fmac::regs::X1bufcfg</a></li><li><a href="fmac/regs/struct.X2bufcfg.html">fmac::regs::X2bufcfg</a></li><li><a href="fmac/regs/struct.Ybufcfg.html">fmac::regs::Ybufcfg</a></li><li><a href="fmc/struct.Fmc.html">fmc::Fmc</a></li><li><a href="fmc/regs/struct.Bcr.html">fmc::regs::Bcr</a></li><li><a href="fmc/regs/struct.Bcr1.html">fmc::regs::Bcr1</a></li><li><a href="fmc/regs/struct.Btr.html">fmc::regs::Btr</a></li><li><a href="fmc/regs/struct.Bwtr.html">fmc::regs::Bwtr</a></li><li><a href="fmc/regs/struct.Eccr.html">fmc::regs::Eccr</a></li><li><a href="fmc/regs/struct.Patt.html">fmc::regs::Patt</a></li><li><a href="fmc/regs/struct.Pcr.html">fmc::regs::Pcr</a></li><li><a href="fmc/regs/struct.Pmem.html">fmc::regs::Pmem</a></li><li><a href="fmc/regs/struct.Sdcmr.html">fmc::regs::Sdcmr</a></li><li><a href="fmc/regs/struct.Sdcr.html">fmc::regs::Sdcr</a></li><li><a href="fmc/regs/struct.Sdrtr.html">fmc::regs::Sdrtr</a></li><li><a href="fmc/regs/struct.Sdsr.html">fmc::regs::Sdsr</a></li><li><a href="fmc/regs/struct.Sdtr.html">fmc::regs::Sdtr</a></li><li><a href="fmc/regs/struct.Sr.html">fmc::regs::Sr</a></li><li><a href="gpio/struct.Gpio.html">gpio::Gpio</a></li><li><a href="gpio/regs/struct.Afr.html">gpio::regs::Afr</a></li><li><a href="gpio/regs/struct.Bsrr.html">gpio::regs::Bsrr</a></li><li><a href="gpio/regs/struct.Idr.html">gpio::regs::Idr</a></li><li><a href="gpio/regs/struct.Lckr.html">gpio::regs::Lckr</a></li><li><a href="gpio/regs/struct.Moder.html">gpio::regs::Moder</a></li><li><a href="gpio/regs/struct.Odr.html">gpio::regs::Odr</a></li><li><a href="gpio/regs/struct.Ospeedr.html">gpio::regs::Ospeedr</a></li><li><a href="gpio/regs/struct.Otyper.html">gpio::regs::Otyper</a></li><li><a href="gpio/regs/struct.Pupdr.html">gpio::regs::Pupdr</a></li><li><a href="i2c/struct.I2c.html">i2c::I2c</a></li><li><a href="i2c/regs/struct.Cr1.html">i2c::regs::Cr1</a></li><li><a href="i2c/regs/struct.Cr2.html">i2c::regs::Cr2</a></li><li><a href="i2c/regs/struct.Icr.html">i2c::regs::Icr</a></li><li><a href="i2c/regs/struct.Isr.html">i2c::regs::Isr</a></li><li><a href="i2c/regs/struct.Oar1.html">i2c::regs::Oar1</a></li><li><a href="i2c/regs/struct.Oar2.html">i2c::regs::Oar2</a></li><li><a href="i2c/regs/struct.Pecr.html">i2c::regs::Pecr</a></li><li><a href="i2c/regs/struct.Rxdr.html">i2c::regs::Rxdr</a></li><li><a href="i2c/regs/struct.Timeoutr.html">i2c::regs::Timeoutr</a></li><li><a href="i2c/regs/struct.Timingr.html">i2c::regs::Timingr</a></li><li><a href="i2c/regs/struct.Txdr.html">i2c::regs::Txdr</a></li><li><a href="iwdg/struct.Iwdg.html">iwdg::Iwdg</a></li><li><a href="iwdg/regs/struct.Kr.html">iwdg::regs::Kr</a></li><li><a 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href="rcc/regs/struct.C1Ahb3lpenr.html">rcc::regs::C1Ahb3lpenr</a></li><li><a href="rcc/regs/struct.C1Ahb4enr.html">rcc::regs::C1Ahb4enr</a></li><li><a href="rcc/regs/struct.C1Ahb4lpenr.html">rcc::regs::C1Ahb4lpenr</a></li><li><a href="rcc/regs/struct.C1Apb1henr.html">rcc::regs::C1Apb1henr</a></li><li><a href="rcc/regs/struct.C1Apb1hlpenr.html">rcc::regs::C1Apb1hlpenr</a></li><li><a href="rcc/regs/struct.C1Apb1lenr.html">rcc::regs::C1Apb1lenr</a></li><li><a href="rcc/regs/struct.C1Apb1llpenr.html">rcc::regs::C1Apb1llpenr</a></li><li><a href="rcc/regs/struct.C1Apb2enr.html">rcc::regs::C1Apb2enr</a></li><li><a href="rcc/regs/struct.C1Apb2lpenr.html">rcc::regs::C1Apb2lpenr</a></li><li><a href="rcc/regs/struct.C1Apb3enr.html">rcc::regs::C1Apb3enr</a></li><li><a href="rcc/regs/struct.C1Apb3lpenr.html">rcc::regs::C1Apb3lpenr</a></li><li><a href="rcc/regs/struct.C1Apb4enr.html">rcc::regs::C1Apb4enr</a></li><li><a href="rcc/regs/struct.C1Apb4lpenr.html">rcc::regs::C1Apb4lpenr</a></li><li><a href="rcc/regs/struct.C1Rsr.html">rcc::regs::C1Rsr</a></li><li><a href="rcc/regs/struct.Cfgr.html">rcc::regs::Cfgr</a></li><li><a href="rcc/regs/struct.Cicr.html">rcc::regs::Cicr</a></li><li><a href="rcc/regs/struct.Cier.html">rcc::regs::Cier</a></li><li><a href="rcc/regs/struct.Cifr.html">rcc::regs::Cifr</a></li><li><a href="rcc/regs/struct.Cr.html">rcc::regs::Cr</a></li><li><a href="rcc/regs/struct.Crrcr.html">rcc::regs::Crrcr</a></li><li><a href="rcc/regs/struct.Csicfgr.html">rcc::regs::Csicfgr</a></li><li><a href="rcc/regs/struct.Csr.html">rcc::regs::Csr</a></li><li><a href="rcc/regs/struct.D1ccipr.html">rcc::regs::D1ccipr</a></li><li><a href="rcc/regs/struct.D1cfgr.html">rcc::regs::D1cfgr</a></li><li><a href="rcc/regs/struct.D2ccip1r.html">rcc::regs::D2ccip1r</a></li><li><a href="rcc/regs/struct.D2ccip2r.html">rcc::regs::D2ccip2r</a></li><li><a href="rcc/regs/struct.D2cfgr.html">rcc::regs::D2cfgr</a></li><li><a href="rcc/regs/struct.D3amr.html">rcc::regs::D3amr</a></li><li><a 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href="timer/vals/enum.Cms.html">timer::vals::Cms</a></li><li><a href="timer/vals/enum.Dir.html">timer::vals::Dir</a></li><li><a href="timer/vals/enum.Etf.html">timer::vals::Etf</a></li><li><a href="timer/vals/enum.Etp.html">timer::vals::Etp</a></li><li><a href="timer/vals/enum.Etps.html">timer::vals::Etps</a></li><li><a href="timer/vals/enum.Icf.html">timer::vals::Icf</a></li><li><a href="timer/vals/enum.Mms.html">timer::vals::Mms</a></li><li><a href="timer/vals/enum.Msm.html">timer::vals::Msm</a></li><li><a href="timer/vals/enum.Ocm.html">timer::vals::Ocm</a></li><li><a href="timer/vals/enum.Ossi.html">timer::vals::Ossi</a></li><li><a href="timer/vals/enum.Ossr.html">timer::vals::Ossr</a></li><li><a href="timer/vals/enum.Sms.html">timer::vals::Sms</a></li><li><a href="timer/vals/enum.Tis.html">timer::vals::Tis</a></li><li><a href="timer/vals/enum.Ts.html">timer::vals::Ts</a></li><li><a href="timer/vals/enum.Urs.html">timer::vals::Urs</a></li><li><a href="usart/vals/enum.Abrmod.html">usart::vals::Abrmod</a></li><li><a href="usart/vals/enum.Addm.html">usart::vals::Addm</a></li><li><a href="usart/vals/enum.Cpha.html">usart::vals::Cpha</a></li><li><a href="usart/vals/enum.Cpol.html">usart::vals::Cpol</a></li><li><a href="usart/vals/enum.Dep.html">usart::vals::Dep</a></li><li><a href="usart/vals/enum.Irlp.html">usart::vals::Irlp</a></li><li><a href="usart/vals/enum.Lbdl.html">usart::vals::Lbdl</a></li><li><a href="usart/vals/enum.M0.html">usart::vals::M0</a></li><li><a href="usart/vals/enum.M1.html">usart::vals::M1</a></li><li><a href="usart/vals/enum.Msbfirst.html">usart::vals::Msbfirst</a></li><li><a href="usart/vals/enum.Over8.html">usart::vals::Over8</a></li><li><a href="usart/vals/enum.Presc.html">usart::vals::Presc</a></li><li><a href="usart/vals/enum.Ps.html">usart::vals::Ps</a></li><li><a href="usart/vals/enum.Rwu.html">usart::vals::Rwu</a></li><li><a href="usart/vals/enum.Stop.html">usart::vals::Stop</a></li><li><a href="usart/vals/enum.Wake.html">usart::vals::Wake</a></li><li><a href="usart/vals/enum.Wus.html">usart::vals::Wus</a></li><li><a href="wwdg/vals/enum.Wdgtb.html">wwdg::vals::Wdgtb</a></li></ul><h3 id="traits">Traits</h3><ul class="all-items"><li><a href="common/trait.Access.html">common::Access</a></li><li><a href="common/trait.Read.html">common::Read</a></li><li><a href="common/trait.Write.html">common::Write</a></li></ul><h3 id="functions">Functions</h3><ul class="all-items"><li><a href="fn.GPIO.html">GPIO</a></li></ul><h3 id="constants">Constants</h3><ul class="all-items"><li><a href="constant.ADC1.html">ADC1</a></li><li><a href="constant.ADC2.html">ADC2</a></li><li><a href="constant.ADC3.html">ADC3</a></li><li><a href="constant.ADC3_COMMON.html">ADC3_COMMON</a></li><li><a href="constant.ADC_COMMON.html">ADC_COMMON</a></li><li><a href="constant.BDMA.html">BDMA</a></li><li><a href="constant.CEC.html">CEC</a></li><li><a href="constant.COMP1.html">COMP1</a></li><li><a href="constant.COMP2.html">COMP2</a></li><li><a href="constant.CORDIC.html">CORDIC</a></li><li><a href="constant.CORE_INDEX.html">CORE_INDEX</a></li><li><a href="constant.CRC.html">CRC</a></li><li><a href="constant.CRS.html">CRS</a></li><li><a href="constant.DAC1.html">DAC1</a></li><li><a href="constant.DBGMCU.html">DBGMCU</a></li><li><a href="constant.DCMI.html">DCMI</a></li><li><a href="constant.DFSDM1.html">DFSDM1</a></li><li><a href="constant.DMA1.html">DMA1</a></li><li><a href="constant.DMA2.html">DMA2</a></li><li><a href="constant.DMA2D.html">DMA2D</a></li><li><a href="constant.DMAMUX1.html">DMAMUX1</a></li><li><a href="constant.DMAMUX2.html">DMAMUX2</a></li><li><a href="constant.DTS.html">DTS</a></li><li><a href="constant.ETH.html">ETH</a></li><li><a href="constant.EXTI.html">EXTI</a></li><li><a href="constant.FDCAN1.html">FDCAN1</a></li><li><a href="constant.FDCAN2.html">FDCAN2</a></li><li><a href="constant.FDCAN3.html">FDCAN3</a></li><li><a href="constant.FDCANRAM.html">FDCANRAM</a></li><li><a href="constant.FLASH.html">FLASH</a></li><li><a href="constant.FLASH_BASE.html">FLASH_BASE</a></li><li><a href="constant.FLASH_SIZE.html">FLASH_SIZE</a></li><li><a href="constant.FMAC.html">FMAC</a></li><li><a href="constant.FMC.html">FMC</a></li><li><a href="constant.GPIOA.html">GPIOA</a></li><li><a href="constant.GPIOB.html">GPIOB</a></li><li><a href="constant.GPIOC.html">GPIOC</a></li><li><a href="constant.GPIOD.html">GPIOD</a></li><li><a href="constant.GPIOE.html">GPIOE</a></li><li><a href="constant.GPIOF.html">GPIOF</a></li><li><a href="constant.GPIOG.html">GPIOG</a></li><li><a href="constant.GPIOH.html">GPIOH</a></li><li><a href="constant.GPIOJ.html">GPIOJ</a></li><li><a href="constant.GPIOK.html">GPIOK</a></li><li><a href="constant.I2C1.html">I2C1</a></li><li><a href="constant.I2C2.html">I2C2</a></li><li><a href="constant.I2C3.html">I2C3</a></li><li><a href="constant.I2C4.html">I2C4</a></li><li><a href="constant.I2C5.html">I2C5</a></li><li><a href="constant.IWDG1.html">IWDG1</a></li><li><a href="constant.LPTIM1.html">LPTIM1</a></li><li><a href="constant.LPTIM2.html">LPTIM2</a></li><li><a href="constant.LPTIM3.html">LPTIM3</a></li><li><a href="constant.LPTIM4.html">LPTIM4</a></li><li><a href="constant.LPTIM5.html">LPTIM5</a></li><li><a href="constant.LPUART1.html">LPUART1</a></li><li><a href="constant.LTDC.html">LTDC</a></li><li><a href="constant.MDIOS.html">MDIOS</a></li><li><a href="constant.MDMA.html">MDMA</a></li><li><a href="constant.OCTOSPI1.html">OCTOSPI1</a></li><li><a href="constant.OCTOSPI2.html">OCTOSPI2</a></li><li><a href="constant.OCTOSPIM.html">OCTOSPIM</a></li><li><a href="constant.OPAMP1.html">OPAMP1</a></li><li><a href="constant.OPAMP2.html">OPAMP2</a></li><li><a href="constant.PSSI.html">PSSI</a></li><li><a href="constant.PWR.html">PWR</a></li><li><a href="constant.RCC.html">RCC</a></li><li><a href="constant.RNG.html">RNG</a></li><li><a href="constant.RTC.html">RTC</a></li><li><a href="constant.SAI1.html">SAI1</a></li><li><a href="constant.SAI4.html">SAI4</a></li><li><a href="constant.SDMMC1.html">SDMMC1</a></li><li><a href="constant.SDMMC2.html">SDMMC2</a></li><li><a href="constant.SPI1.html">SPI1</a></li><li><a href="constant.SPI2.html">SPI2</a></li><li><a href="constant.SPI3.html">SPI3</a></li><li><a href="constant.SPI4.html">SPI4</a></li><li><a href="constant.SPI5.html">SPI5</a></li><li><a href="constant.SPI6.html">SPI6</a></li><li><a href="constant.SWPMI1.html">SWPMI1</a></li><li><a href="constant.SYSCFG.html">SYSCFG</a></li><li><a href="constant.TIM1.html">TIM1</a></li><li><a href="constant.TIM12.html">TIM12</a></li><li><a href="constant.TIM13.html">TIM13</a></li><li><a href="constant.TIM14.html">TIM14</a></li><li><a href="constant.TIM15.html">TIM15</a></li><li><a href="constant.TIM16.html">TIM16</a></li><li><a href="constant.TIM17.html">TIM17</a></li><li><a href="constant.TIM2.html">TIM2</a></li><li><a href="constant.TIM23.html">TIM23</a></li><li><a href="constant.TIM24.html">TIM24</a></li><li><a href="constant.TIM3.html">TIM3</a></li><li><a href="constant.TIM4.html">TIM4</a></li><li><a href="constant.TIM5.html">TIM5</a></li><li><a href="constant.TIM6.html">TIM6</a></li><li><a href="constant.TIM7.html">TIM7</a></li><li><a href="constant.TIM8.html">TIM8</a></li><li><a href="constant.UART4.html">UART4</a></li><li><a href="constant.UART5.html">UART5</a></li><li><a href="constant.UART7.html">UART7</a></li><li><a href="constant.UART8.html">UART8</a></li><li><a href="constant.UART9.html">UART9</a></li><li><a href="constant.UID.html">UID</a></li><li><a href="constant.USART1.html">USART1</a></li><li><a href="constant.USART10.html">USART10</a></li><li><a href="constant.USART2.html">USART2</a></li><li><a href="constant.USART3.html">USART3</a></li><li><a href="constant.USART6.html">USART6</a></li><li><a href="constant.USB_OTG_HS.html">USB_OTG_HS</a></li><li><a href="constant.VREFBUF.html">VREFBUF</a></li><li><a href="constant.WRITE_SIZE.html">WRITE_SIZE</a></li><li><a href="constant.WWDG1.html">WWDG1</a></li></ul></section></div></main></body></html>
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