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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="Miscellaneous Control Register"><title>imxrt_ral::pmu::MISC2_CLR - Rust</title><script>if(window.location.protocol!=="file:")document.head.insertAdjacentHTML("beforeend","SourceSerif4-Regular-46f98efaafac5295.ttf.woff2,FiraSans-Regular-018c141bf0843ffd.woff2,FiraSans-Medium-8f9a781e4970d388.woff2,SourceCodePro-Regular-562dcc5011b6de7d.ttf.woff2,SourceCodePro-Semibold-d899c5a5c4aeb14a.ttf.woff2".split(",").map(f=>`<link rel="preload" as="font" type="font/woff2" crossorigin href="../../../static.files/${f}">`).join(""))</script><link rel="stylesheet" href="../../../static.files/normalize-76eba96aa4d2e634.css"><link rel="stylesheet" href="../../../static.files/rustdoc-492a78a4a87dcc01.css"><meta name="rustdoc-vars" data-root-path="../../../" data-static-root-path="../../../static.files/" data-current-crate="imxrt_ral" data-themes="" data-resource-suffix="" data-rustdoc-version="1.82.0 (f6e511eec 2024-10-15)" data-channel="1.82.0" data-search-js="search-a99f1315e7cc5121.js" data-settings-js="settings-4313503d2e1961c2.js" ><script src="../../../static.files/storage-118b08c4c78b968e.js"></script><script defer src="../sidebar-items.js"></script><script defer src="../../../static.files/main-921df33f47b8780c.js"></script><noscript><link rel="stylesheet" href="../../../static.files/noscript-3b12f09e550e0385.css"></noscript><link rel="alternate icon" type="image/png" href="../../../static.files/favicon-32x32-422f7d1d52889060.png"><link rel="icon" type="image/svg+xml" href="../../../static.files/favicon-2c020d218678b618.svg"></head><body class="rustdoc mod"><!--[if lte IE 11]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="mobile-topbar"><button class="sidebar-menu-toggle" title="show sidebar"></button></nav><nav class="sidebar"><div class="sidebar-crate"><h2><a href="../../../imxrt_ral/index.html">imxrt_<wbr>ral</a><span class="version">0.5.3</span></h2></div><h2 class="location"><a href="#">Module MISC2_<wbr>CLR</a></h2><div class="sidebar-elems"><section><ul class="block"><li><a href="#modules">Modules</a></li></ul></section><h2><a href="../index.html">In imxrt_<wbr>ral::<wbr>pmu</a></h2></div></nav><div class="sidebar-resizer"></div><main><div class="width-limiter"><rustdoc-search></rustdoc-search><section id="main-content" class="content"><div class="main-heading"><h1>Module <a href="../../index.html">imxrt_ral</a>::<wbr><a href="../index.html">pmu</a>::<wbr><a class="mod" href="#">MISC2_CLR</a><button id="copy-path" title="Copy item path to clipboard">Copy item path</button></h1><span class="out-of-band"><a class="src" href="../../../src/imxrt_ral/blocks/imxrt1011/pmu.rs.html#3353">source</a> · <button id="toggle-all-docs" title="collapse all docs">[<span>−</span>]</button></span></div><details class="toggle top-doc" open><summary class="hideme"><span>Expand description</span></summary><div class="docblock"><p>Miscellaneous Control Register</p>
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</div></details><h2 id="modules" class="section-header">Modules<a href="#modules" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="mod" href="AUDIO_DIV_LSB/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::AUDIO_DIV_LSB">AUDI<wbr>O_<wbr>DIV_<wbr>LSB</a></div><div class="desc docblock-short">LSB of Post-divider for Audio PLL</div></li><li><div class="item-name"><a class="mod" href="AUDIO_DIV_MSB/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::AUDIO_DIV_MSB">AUDI<wbr>O_<wbr>DIV_<wbr>MSB</a></div><div class="desc docblock-short">MSB of Post-divider for Audio PLL</div></li><li><div class="item-name"><a class="mod" href="PLL3_DISABLE/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::PLL3_DISABLE">PLL3_<wbr>DISABLE</a></div><div class="desc docblock-short">Default value of “0”</div></li><li><div class="item-name"><a class="mod" href="REG0_BO_OFFSET/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG0_BO_OFFSET">REG0_<wbr>BO_<wbr>OFFSET</a></div><div class="desc docblock-short">This field defines the brown out voltage offset for the CORE power domain</div></li><li><div class="item-name"><a class="mod" href="REG0_BO_STATUS/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG0_BO_STATUS">REG0_<wbr>BO_<wbr>STATUS</a></div><div class="desc docblock-short">Reg0 brownout status bit.</div></li><li><div class="item-name"><a class="mod" href="REG0_ENABLE_BO/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG0_ENABLE_BO">REG0_<wbr>ENABL<wbr>E_<wbr>BO</a></div><div class="desc docblock-short">Enables the brownout detection.</div></li><li><div class="item-name"><a class="mod" href="REG0_STEP_TIME/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG0_STEP_TIME">REG0_<wbr>STEP_<wbr>TIME</a></div><div class="desc docblock-short">Number of clock periods (24MHz clock).</div></li><li><div class="item-name"><a class="mod" href="REG1_BO_OFFSET/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG1_BO_OFFSET">REG1_<wbr>BO_<wbr>OFFSET</a></div><div class="desc docblock-short">This field defines the brown out voltage offset for the xPU power domain</div></li><li><div class="item-name"><a class="mod" href="REG1_BO_STATUS/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG1_BO_STATUS">REG1_<wbr>BO_<wbr>STATUS</a></div><div class="desc docblock-short">Reg1 brownout status bit.</div></li><li><div class="item-name"><a class="mod" href="REG1_ENABLE_BO/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG1_ENABLE_BO">REG1_<wbr>ENABL<wbr>E_<wbr>BO</a></div><div class="desc docblock-short">Enables the brownout detection.</div></li><li><div class="item-name"><a class="mod" href="REG1_STEP_TIME/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG1_STEP_TIME">REG1_<wbr>STEP_<wbr>TIME</a></div><div class="desc docblock-short">Number of clock periods (24MHz clock).</div></li><li><div class="item-name"><a class="mod" href="REG2_BO_OFFSET/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG2_BO_OFFSET">REG2_<wbr>BO_<wbr>OFFSET</a></div><div class="desc docblock-short">This field defines the brown out voltage offset for the xPU power domain</div></li><li><div class="item-name"><a class="mod" href="REG2_BO_STATUS/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG2_BO_STATUS">REG2_<wbr>BO_<wbr>STATUS</a></div><div class="desc docblock-short">Reg2 brownout status bit.</div></li><li><div class="item-name"><a class="mod" href="REG2_ENABLE_BO/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG2_ENABLE_BO">REG2_<wbr>ENABL<wbr>E_<wbr>BO</a></div><div class="desc docblock-short">Enables the brownout detection.</div></li><li><div class="item-name"><a class="mod" href="REG2_OK/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG2_OK">REG2_OK</a></div><div class="desc docblock-short">Signals that the voltage is above the brownout level for the SOC supply</div></li><li><div class="item-name"><a class="mod" href="REG2_STEP_TIME/index.html" title="mod imxrt_ral::pmu::MISC2_CLR::REG2_STEP_TIME">REG2_<wbr>STEP_<wbr>TIME</a></div><div class="desc docblock-short">Number of clock periods (24MHz clock).</div></li></ul></section></div></main></body></html> |