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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="ADC_ETC Global Control Register"><title>imxrt_ral::adc_etc::CTRL - Rust</title><script>if(window.location.protocol!=="file:")document.head.insertAdjacentHTML("beforeend","SourceSerif4-Regular-46f98efaafac5295.ttf.woff2,FiraSans-Regular-018c141bf0843ffd.woff2,FiraSans-Medium-8f9a781e4970d388.woff2,SourceCodePro-Regular-562dcc5011b6de7d.ttf.woff2,SourceCodePro-Semibold-d899c5a5c4aeb14a.ttf.woff2".split(",").map(f=>`<link rel="preload" as="font" type="font/woff2" crossorigin href="../../../static.files/${f}">`).join(""))</script><link rel="stylesheet" href="../../../static.files/normalize-76eba96aa4d2e634.css"><link rel="stylesheet" href="../../../static.files/rustdoc-b0742ba02757f159.css"><meta name="rustdoc-vars" data-root-path="../../../" data-static-root-path="../../../static.files/" data-current-crate="imxrt_ral" data-themes="" data-resource-suffix="" data-rustdoc-version="1.83.0 (90b35a623 2024-11-26)" data-channel="1.83.0" data-search-js="search-f0d225181b97f9a4.js" data-settings-js="settings-805db61a62df4bd2.js" ><script src="../../../static.files/storage-1d39b6787ed640ff.js"></script><script defer src="../sidebar-items.js"></script><script defer src="../../../static.files/main-f070b9041d14864c.js"></script><noscript><link rel="stylesheet" href="../../../static.files/noscript-0111fcff984fae8f.css"></noscript><link rel="alternate icon" type="image/png" href="../../../static.files/favicon-32x32-422f7d1d52889060.png"><link rel="icon" type="image/svg+xml" href="../../../static.files/favicon-2c020d218678b618.svg"></head><body class="rustdoc mod"><!--[if lte IE 11]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="mobile-topbar"><button class="sidebar-menu-toggle" title="show sidebar"></button></nav><nav class="sidebar"><div class="sidebar-crate"><h2><a href="../../../imxrt_ral/index.html">imxrt_<wbr>ral</a><span class="version">0.5.3</span></h2></div><div class="sidebar-elems"><section id="rustdoc-toc"><h2 class="location"><a href="#">Module CTRL</a></h2><h3><a href="#modules">Module Items</a></h3><ul class="block"><li><a href="#modules" title="Modules">Modules</a></li></ul></section><div id="rustdoc-modnav"><h2><a href="../index.html">In imxrt_<wbr>ral::<wbr>adc_<wbr>etc</a></h2></div></div></nav><div class="sidebar-resizer"></div><main><div class="width-limiter"><rustdoc-search></rustdoc-search><section id="main-content" class="content"><div class="main-heading"><span class="rustdoc-breadcrumbs"><a href="../../index.html">imxrt_ral</a>::<wbr><a href="../index.html">adc_etc</a></span><h1>Module <span>CTRL</span><button id="copy-path" title="Copy item path to clipboard">Copy item path</button></h1><rustdoc-toolbar></rustdoc-toolbar><span class="sub-heading"><a class="src" href="../../../src/imxrt_ral/blocks/imxrt1011/adc_etc.rs.html#94">source</a> </span></div><details class="toggle top-doc" open><summary class="hideme"><span>Expand description</span></summary><div class="docblock"><p>ADC_ETC Global Control Register</p>
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</div></details><h2 id="modules" class="section-header">Modules<a href="#modules" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="mod" href="DMA_MODE_SEL/index.html" title="mod imxrt_ral::adc_etc::CTRL::DMA_MODE_SEL">DMA_<wbr>MODE_<wbr>SEL</a></div><div class="desc docblock-short">1’b0: Trig DMA_REQ with latched signal, REQ will be cleared when ACK and source request cleared</div></li><li><div class="item-name"><a class="mod" href="EXT0_TRIG_ENABLE/index.html" title="mod imxrt_ral::adc_etc::CTRL::EXT0_TRIG_ENABLE">EXT0_<wbr>TRIG_<wbr>ENABLE</a></div><div class="desc docblock-short">TSC0 TRIG enable register. 1’b1: enable external TSC0 trigger. 1’b0: disable external TSC0 trigger.</div></li><li><div class="item-name"><a class="mod" href="EXT0_TRIG_PRIORITY/index.html" title="mod imxrt_ral::adc_etc::CTRL::EXT0_TRIG_PRIORITY">EXT0_<wbr>TRIG_<wbr>PRIORITY</a></div><div class="desc docblock-short">External TSC0 trigger priority, 7 is Highest, 0 is lowest .</div></li><li><div class="item-name"><a class="mod" href="EXT1_TRIG_ENABLE/index.html" title="mod imxrt_ral::adc_etc::CTRL::EXT1_TRIG_ENABLE">EXT1_<wbr>TRIG_<wbr>ENABLE</a></div><div class="desc docblock-short">TSC1 TRIG enable register. 1’b1: enable external TSC1 trigger. 1’b0: disable external TSC1 trigger.</div></li><li><div class="item-name"><a class="mod" href="EXT1_TRIG_PRIORITY/index.html" title="mod imxrt_ral::adc_etc::CTRL::EXT1_TRIG_PRIORITY">EXT1_<wbr>TRIG_<wbr>PRIORITY</a></div><div class="desc docblock-short">External TSC1 trigger priority, 7 is Highest, 0 is lowest .</div></li><li><div class="item-name"><a class="mod" href="PRE_DIVIDER/index.html" title="mod imxrt_ral::adc_etc::CTRL::PRE_DIVIDER">PRE_<wbr>DIVIDER</a></div><div class="desc docblock-short">Pre-divider for trig delay and interval .</div></li><li><div class="item-name"><a class="mod" href="SOFTRST/index.html" title="mod imxrt_ral::adc_etc::CTRL::SOFTRST">SOFTRST</a></div><div class="desc docblock-short">Software reset, high active. When write 1 ,all logical will be reset.</div></li><li><div class="item-name"><a class="mod" href="TRIG_ENABLE/index.html" title="mod imxrt_ral::adc_etc::CTRL::TRIG_ENABLE">TRIG_<wbr>ENABLE</a></div><div class="desc docblock-short">TRIG enable register</div></li><li><div class="item-name"><a class="mod" href="TSC_BYPASS/index.html" title="mod imxrt_ral::adc_etc::CTRL::TSC_BYPASS">TSC_<wbr>BYPASS</a></div><div class="desc docblock-short">1’b1: TSC is bypassed to ADC2. 1’b0: TSC not bypassed. To use ADC2, this bit should be cleared.</div></li></ul></section></div></main></body></html> |