Module p0

GPIO Port 1

Modules

• detectmode
  Select between default DETECT signal behaviour and LDETECT mode
• dir
  Direction of GPIO pins
• dirclr
  DIR clear register
• dirset
  DIR set register
• in_
  Read GPIO port
• latch
  Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers
• out
  Write GPIO port
• outclr
  Clear individual bits in GPIO port
• outset
  Set individual bits in GPIO port
• pin_cnf
  Description collection[n]: Configuration of GPIO pins

Structs

• RegisterBlock
  Register block

Type Aliases

• DETECTMODE
  DETECTMODE (rw) register accessor: an alias for Reg<DETECTMODE_SPEC>
• DIR
  DIR (rw) register accessor: an alias for Reg<DIR_SPEC>
• DIRCLR
  DIRCLR (rw) register accessor: an alias for Reg<DIRCLR_SPEC>
• DIRSET
  DIRSET (rw) register accessor: an alias for Reg<DIRSET_SPEC>
• IN
  IN (r) register accessor: an alias for Reg<IN_SPEC>
• LATCH
  LATCH (rw) register accessor: an alias for Reg<LATCH_SPEC>
• OUT
  OUT (rw) register accessor: an alias for Reg<OUT_SPEC>
• OUTCLR
  OUTCLR (rw) register accessor: an alias for Reg<OUTCLR_SPEC>
• OUTSET
  OUTSET (rw) register accessor: an alias for Reg<OUTSET_SPEC>
• PIN_CNF
  PIN_CNF (rw) register accessor: an alias for Reg<PIN_CNF_SPEC>