Commit graph

221 commits

Author SHA1 Message Date
Per Lindgren
8444ba7054 export Cell removed, expmples updated 2023-01-26 22:22:36 +01:00
Emil Fresk
acd20301be Removed Priority, simplified lifetime handling 2023-01-26 22:22:33 +01:00
Emil Fresk
e4c95fd26f More removal 2023-01-26 22:21:24 +01:00
Emil Fresk
50a05e9d1c Even more cleanup 2023-01-26 22:21:24 +01:00
Emil Fresk
ac4a3edf90 Old xtask test pass 2023-01-26 22:19:42 +01:00
Emil Fresk
4c2c05a801 RTIC v2: Initial commit
rtic-syntax is now part of RTIC repository
2023-01-26 22:00:59 +01:00
David Watson
368ab1d4fb Remove use of basepri register on thumbv8m.base
The basepri register appears to be aviable on thumbv8m.main but not
thumbv8m.base. At the very least, attempting to compile against a
Cortex-M23 based Microchip ATSAML10E16A generates an error:

```
error[E0432]: unresolved import `cortex_m::register::basepri`
  --> /Users/dwatson/.cargo/registry/src/github.com-1ecc6299db9ec823/cortex-m-rtic-1.1.3/src/export.rs:25:5
   |
25 | use cortex_m::register::basepri;
   |     ^^^^^^^^^^^^^^^^^^^^^^^^^^^ no `basepri` in `register`
```

This is an attempt to account for the fact that thumbv8m.base (M23)
MCUs don't have the BASEPRI register but have more than 32
interrupts. This moves away from the architecture specific config
flags and switches to a more functional flag.

Make the mask size depend on the max interrupt id

Rather than assuming a fixed interrupt count of 32 this code uses an
array of u32 bitmasks to calculate the priority mask. The size of this
array is calculated at compile time based on the size of the largest
interrupt id being used in the target code. For thumbv6m this should
be equivalent to the previous version that used a single u32 mask. For
thumbv8m.base it will be larger depending on the interrupts used.

Don't write 0s to the ISER and ICER registers

Writing 0s to these registers is a no-op. Since these masks should be
calculated at compile time, this conditional should result in writes
being optimized out of the code.

Prevent panic on non-arm targets

Panicking on unknown targets was breaking things like the doc build on
linux. This change should only panic when building on unknown arm
targets.
2022-07-27 21:04:24 +02:00
Jorge Aparicio
ab90426416 fix ci: use SYST::PTR
SYST::ptr has been deprecated in cortex-m v0.7.5
SYST::PTR is available since cortex-m v0.7.0
2022-06-07 12:37:42 +02:00
Emil Fresk
b15bda2d39 Fix clash with defmt 2022-05-24 08:31:31 +02:00
Emil Fresk
0f8bdbdd3f Added check for resource usage and to generate an compile error for thumbv6 exceptions 2022-04-20 13:05:22 +02:00
Emil Fresk
9f38a39377 Masks take 3 2022-04-20 10:56:13 +02:00
Per Lindgren
f86dab5ff3 Added support for SRP based scheduling for armv6m 2022-03-02 13:23:47 +01:00
Henrik Tjäder
5ed93bd1bf Clippy with pedantic suggestions 2022-02-22 18:56:21 +01:00
Henrik Tjäder
7eaf732c4c Provide Mutex relative to prelude to fix doc linking issues coming from rtic-core 2022-02-20 11:57:31 +01:00
Henrik Tjäder
2c14c9bce3 rtic::mutex::prelude::* fixes glob import lint
rtic-core Mutex, Exclusive and multi-lock retained in
old location to not be backwards breaking
2022-02-18 18:42:19 +01:00
Henrik Tjäder
099544f655 Fix/mute clippy errors 2022-02-09 18:58:50 +01:00
Per Lindgren
28cf223bfd Docfix: MSRV and Semantic Versioning 2021-12-25 18:15:41 +01:00
Per Lindgren
53306b1a7b Docfix: remove pre-release note 2021-12-25 17:59:19 +01:00
bors[bot]
bc883e393d
Merge #565 #566
565: Edition: Bump to 2021 r=korken89 a=AfoHT



566: v1.0.0 r=korken89 a=AfoHT

This should fail building until all deps are released and accessible on crates.io

(There are some required PRs for edition2021 for each repo, alternatively just bringing in the v1.0 PR should have commits included, we can drop the extra PRs later on)

https://github.com/rtic-rs/rtic-monotonic/pull/6
https://github.com/rtic-rs/rtic-core/pull/22
https://github.com/rtic-rs/rtic-syntax/pull/68


Co-authored-by: Henrik Tjäder <henrik@grepit.se>
2021-12-25 15:05:26 +00:00
Henrik Tjäder
c297b4ee8d Clippy lints 2021-12-25 13:17:16 +01:00
Henrik Tjäder
93ceb6bdef Edition: Bump to 2021 2021-12-25 13:10:10 +01:00
Henrik Tjäder
8c8f7f12c3 Idle: Switch to NOP instead of WFI
Add example how to get old WFI behaviour
2021-12-14 22:18:17 +01:00
Henrik Tjäder
3741d431be Remove #[deny(warnings)], but deny warnings for CI 2021-11-25 10:46:29 +01:00
Henrik Tjäder
2e5c6f8e36 Docs: add RTIC logo 2021-11-25 10:06:58 +01:00
Emil Fresk
0dcb0c4e49 New monotonic trait working 2021-11-09 10:20:43 +01:00
Per Lindgren
1e2ab78a3f added doc for RacyCell 2021-11-02 19:47:14 +01:00
Emil Fresk
8065d741ac Fixed aliasing issue due to RacyCell implementation 2021-11-02 13:41:12 +01:00
Emil Fresk
7c6588e6bd Fix export of SYST 2021-09-28 10:38:22 +02:00
Emil Fresk
cdab00a0c6 Fix a bug in the timer queue due to comparison bug in embedded-time 2021-09-27 15:39:05 +02:00
Emil Fresk
addb086070 Cleanup export and actually use rtic::export, made fn init inline 2021-09-14 16:13:28 +02:00
Emil Fresk
bc3eb5c547 Remove linked list impl - use heapless, linked list init now const fn 2021-08-16 15:38:31 +02:00
Andrey Zgarbul
e4319de3d5 const generics 2021-07-09 18:44:19 +03:00
James Hillyerd
87c958da3b assert empty 2021-06-06 15:00:52 -07:00
James Hillyerd
064ff239f3 Allow zero sized LinkedList 2021-06-06 14:56:00 -07:00
Emil Fresk
6aa0fb450f Goodbye static mut 2021-04-08 19:58:20 +02:00
Emil Fresk
51500a1d70 Fixed UB in spawn_at 2021-04-08 10:14:14 +02:00
Emil Fresk
3adda3c766 Updated schedule example with all combinations 2021-03-22 08:24:18 +01:00
Emil Fresk
53c407017f Cancel and reschedule working
Support cfgs in the imports

Account for extern tasks
2021-03-20 08:19:56 +01:00
Emil Fresk
1087f2ee64 Added interface for cancel/reschedule
Use wrapping add for marker

No need to store handle to queue

Remove unnecessary `SpawnHandle::new`

Fix test

Updated interface to follow proposal
2021-03-13 10:50:56 +01:00
Emil Fresk
767d46e05b Review fixes 2021-02-25 17:32:12 +01:00
Emil Fresk
56d99c02bd Updated to new interface 2021-02-22 20:59:23 +01:00
Emil Fresk
82d051e8e9 Added enable/disable timer calls 2021-02-22 20:59:03 +01:00
Emil Fresk
e52088bbd8 Of by 1 2021-02-22 20:15:13 +01:00
Emil Fresk
ebf2f058a4 Now with new monotonic trait and crate 2021-02-18 19:30:59 +01:00
Emil Fresk
b57ef0bf9d Merge branch 'master' into new_monotonic 2021-02-06 21:34:16 +01:00
Emil Fresk
0658d53843 cleanup 2021-01-10 15:47:25 +01:00
Nicolas Stalder
aa90cb1484 Bump cortex-m to 0.7.0 2021-01-04 16:07:17 +01:00
Emil Fresk
aaa92ea2fa Cleanup 2020-12-13 17:48:11 +01:00
Emil Fresk
0e134a41b5 Double check the compare instant 2020-12-13 14:20:28 +01:00
Emil Fresk
dd52539e32 Less ... hacky? 2020-12-13 00:09:44 +01:00