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https://github.com/rtic-rs/rtic.git
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peripherals as scoped singletons
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parent
e620b1e57a
commit
e97afa71ce
7 changed files with 68 additions and 30 deletions
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@ -10,13 +10,13 @@ keywords = ["arm", "cortex-m"]
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license = "MIT OR Apache-2.0"
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name = "cortex-m-rtfm"
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repository = "https://github.com/japaric/cortex-m-rtfm"
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version = "0.2.2"
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version = "0.3.0"
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[dependencies]
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cortex-m = "0.3.1"
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cortex-m = { git = "https://github.com/japaric/cortex-m" }
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untagged-option = "0.1.1"
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rtfm-core = "0.1.0"
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cortex-m-rtfm-macros = "0.2.1"
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cortex-m-rtfm-macros = { path = "macros" }
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[target.'cfg(target_arch = "x86_64")'.dev-dependencies]
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compiletest_rs = "0.3.3"
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@ -27,7 +27,8 @@ version = "0.3.3"
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[dev-dependencies.stm32f103xx]
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features = ["rt"]
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version = "0.7.5"
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git = "https://github.com/japaric/stm32f103xx"
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# version = "0.8.0"
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[profile.release]
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lto = true
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@ -12,6 +12,11 @@ use stm32f103xx::{SPI1, GPIOA};
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app! {
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device: stm32f103xx,
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resources: {
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static GPIOA: GPIOA;
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static SPI1: SPI1;
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},
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tasks: {
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EXTI0: {
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path: exti0,
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@ -27,7 +32,12 @@ app! {
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},
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}
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fn init(_p: init::Peripherals) {}
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fn init(p: init::Peripherals) -> init::LateResourceValues {
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init::LateResourceValues {
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GPIOA: p.device.GPIOA,
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SPI1: p.device.SPI1,
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}
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}
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fn idle() -> ! {
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loop {
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@ -7,8 +7,9 @@ extern crate cortex_m;
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extern crate cortex_m_rtfm as rtfm;
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extern crate stm32f103xx;
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use cortex_m::peripheral::SystClkSource;
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use cortex_m::peripheral::syst::SystClkSource;
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use rtfm::{app, Threshold};
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use stm32f103xx::GPIOC;
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app! {
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device: stm32f103xx,
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@ -35,9 +36,8 @@ app! {
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// These are the resources this task has access to.
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//
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// A resource can be a peripheral like `GPIOC` or a static variable
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// like `ON`
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resources: [GPIOC, ON],
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// The resources listed here must also appear in `app.resources`
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resources: [ON],
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},
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}
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}
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@ -47,19 +47,20 @@ fn init(p: init::Peripherals, r: init::Resources) {
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r.ON;
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// power on GPIOC
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p.RCC.apb2enr.modify(|_, w| w.iopcen().enabled());
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p.device.RCC.apb2enr.modify(|_, w| w.iopcen().enabled());
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// configure PC13 as output
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p.GPIOC.bsrr.write(|w| w.bs13().set());
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p.GPIOC
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p.device.GPIOC.bsrr.write(|w| w.bs13().set());
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p.device
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.GPIOC
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.crh
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.modify(|_, w| w.mode13().output().cnf13().push());
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// configure the system timer to generate one interrupt every second
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p.SYST.set_clock_source(SystClkSource::Core);
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p.SYST.set_reload(8_000_000); // 1s
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p.SYST.enable_interrupt();
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p.SYST.enable_counter();
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p.core.SYST.set_clock_source(SystClkSource::Core);
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p.core.SYST.set_reload(8_000_000); // 1s
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p.core.SYST.enable_interrupt();
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p.core.SYST.enable_counter();
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}
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fn idle() -> ! {
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@ -74,15 +75,22 @@ fn idle() -> ! {
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//
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// `r` is the set of resources this task has access to. `SYS_TICK::Resources`
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// has one field per resource declared in `app!`.
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#[allow(unsafe_code)]
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fn sys_tick(_t: &mut Threshold, r: SYS_TICK::Resources) {
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// toggle state
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**r.ON = !**r.ON;
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if **r.ON {
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// set the pin PC13 high
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r.GPIOC.bsrr.write(|w| w.bs13().set());
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// NOTE(unsafe) atomic write to a stateless register
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unsafe {
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(*GPIOC::ptr()).bsrr.write(|w| w.bs13().set());
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}
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} else {
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// set the pin PC13 low
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r.GPIOC.bsrr.write(|w| w.br13().reset());
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// NOTE(unsafe) atomic write to a stateless register
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unsafe {
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(*GPIOC::ptr()).bsrr.write(|w| w.br13().reset());
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}
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}
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}
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@ -25,8 +25,9 @@ app! {
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// this function.
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fn init(p: init::Peripherals) {
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// This function has access to all the peripherals of the device
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p.GPIOA;
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p.RCC;
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p.core.SYST;
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p.device.GPIOA;
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p.device.RCC;
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// ..
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}
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@ -63,16 +63,15 @@ pub fn app(app: check::App) -> Result<App> {
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tasks: app.tasks
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.into_iter()
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.map(|(k, v)| {
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let v = ::check::task(k.as_ref(), v)
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.chain_err(|| format!("checking task `{}`", k))?;
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let v =
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::check::task(k.as_ref(), v).chain_err(|| format!("checking task `{}`", k))?;
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Ok((k, v))
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})
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.collect::<Result<_>>()?,
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};
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::check::resources(&app)
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.chain_err(|| "checking `resources`")?;
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::check::resources(&app).chain_err(|| "checking `resources`")?;
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Ok(app)
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}
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@ -93,6 +92,17 @@ fn resources(app: &App) -> Result<()> {
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bail!("resource `{}` is unused", resource);
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}
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for (name, task) in &app.tasks {
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for resource in &task.resources {
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ensure!(
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app.resources.contains_key(&resource),
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"task {} contains an undeclared resource with name {}",
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name,
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resource
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);
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}
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}
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Ok(())
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}
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@ -161,8 +161,13 @@ fn init(app: &App, main: &mut Vec<Tokens>, root: &mut Vec<Tokens>) {
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let device = &app.device;
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let krate = krate();
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let mut tys = vec![quote!(#device::Peripherals)];
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let mut exprs = vec![quote!(#device::Peripherals::all())];
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let mut tys = vec![quote!(init::Peripherals)];
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let mut exprs = vec![quote!{
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init::Peripherals {
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core: ::#device::CorePeripherals::steal(),
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device: ::#device::Peripherals::steal(),
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}
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}];
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let mut ret = None;
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let mut mod_items = vec![];
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@ -255,7 +260,10 @@ fn init(app: &App, main: &mut Vec<Tokens>, root: &mut Vec<Tokens>) {
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root.push(quote! {
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#[allow(unsafe_code)]
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mod init {
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pub use ::#device::Peripherals;
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pub struct Peripherals {
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pub core: ::#device::CorePeripherals,
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pub device: ::#device::Peripherals,
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}
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#(#mod_items)*
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}
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@ -268,7 +276,7 @@ fn init(app: &App, main: &mut Vec<Tokens>, root: &mut Vec<Tokens>) {
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Kind::Exception(ref e) => {
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if exceptions.is_empty() {
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exceptions.push(quote! {
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let scb = &*#device::SCB.get();
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let scb = &*#device::SCB::ptr();
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});
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}
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@ -284,7 +292,7 @@ fn init(app: &App, main: &mut Vec<Tokens>, root: &mut Vec<Tokens>) {
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// Interrupt. These can be enabled / disabled through the NVIC
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if interrupts.is_empty() {
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interrupts.push(quote! {
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let nvic = &*#device::NVIC.get();
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let nvic = &*#device::NVIC::ptr();
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});
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}
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@ -160,6 +160,6 @@ where
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I: Nr,
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{
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// NOTE(safe) atomic write
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let nvic = unsafe { &*cortex_m::peripheral::NVIC.get() };
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let nvic = unsafe { &*cortex_m::peripheral::NVIC::ptr() };
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nvic.set_pending(interrupt);
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}
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