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atsamd21: unmask TC4 interrupt

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This commit is contained in:
Maxime Borges 2024-11-11 11:14:46 +01:00
parent 03ace97cd1
commit d71ef67c4c
3 changed files with 7 additions and 9 deletions
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2
rtic-monotonics/Cargo.toml
View file

@ -118,7 +118,7 @@ imxrt_gpt2 = ["imxrt"]
esp32c3-systimer = ["dep:esp32c3", "dep:riscv"]
# ATSAMD21 Timer
atsamd21g = ["dep:atsamd21g"]
atsamd21g = ["dep:cortex-m", "dep:atsamd21g"]
# STM32 timers

13
rtic-monotonics/src/atsamd21.rs
View file

@ -25,14 +25,6 @@
//! Mono::delay(100.millis()).await;
//! }
//! }
//!
//! // FIXME: the interrupt handler is not working, but re-implementing it in a RTIC task does
//! // Comment the interrupt handler `unsafe extern "C" fn TC4()` and add the following RTIC task
//! #[task(binds = TC4)]
//! fn tc4(_cx: tc4::Context) {
//! use rtic_time::timer_queue::TimerQueueBackend;
//! unsafe { Tc4Tc5Backend::timer_queue().on_monotonic_interrupt() };
//! }
//! ```
/// Common definitions and traits for using the ATSAMD21 TC4/5 monotonic
@ -114,6 +106,11 @@ impl Tc4Tc5Backend {
// Enable the timer
tc4.ctrla().modify(|_, w| w.enable().set_bit());
Self::sync();
unsafe {
crate::set_monotonic_prio(pac::NVIC_PRIO_BITS, pac::Interrupt::TC4);
pac::NVIC::unmask(pac::Interrupt::TC4);
}
}
}

1
rtic-monotonics/src/lib.rs
View file

@ -99,6 +99,7 @@ pub(crate) const fn cortex_logical2hw(logical: u8, nvic_prio_bits: u8) -> u8 {
feature = "nrf5340-net",
feature = "nrf9160",
feature = "imxrt",
feature = "atsamd21g",
stm32,
))]
pub(crate) unsafe fn set_monotonic_prio(