mirror of
https://github.com/rtic-rs/rtic.git
synced 2024-11-30 15:34:33 +01:00
Remove all of heterogeneous and homogeneous modules
This commit is contained in:
parent
d06cf91acc
commit
d2151ccbf9
16 changed files with 0 additions and 491 deletions
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@ -1,18 +0,0 @@
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[package]
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authors = ["Jorge Aparicio <jorge@japaric.io>"]
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edition = "2018"
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name = "heterogeneous"
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# this crate is only used for testing
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publish = false
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version = "0.0.0-alpha.0"
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[dependencies]
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bare-metal = "0.2.4"
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[dependencies.cortex-m-rtic]
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path = ".."
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features = ["heterogeneous"]
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[dev-dependencies]
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panic-halt = "0.2.0"
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microamp = "0.1.0-alpha.1"
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@ -1 +0,0 @@
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This directory contains *heterogeneous* multi-core compile pass tests.
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@ -1,7 +0,0 @@
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#![no_main]
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#![no_std]
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use panic_halt as _;
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#[rtic::app(cores = 2, device = heterogeneous)]
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const APP: () = {};
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@ -1,39 +0,0 @@
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//! [compile-pass] Cross initialization of late resources
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#![deny(unsafe_code)]
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#![deny(warnings)]
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#![no_main]
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#![no_std]
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use panic_halt as _;
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#[rtic::app(cores = 2, device = heterogeneous)]
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const APP: () = {
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struct Resources {
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// owned by core #1 but initialized by core #0
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x: u32,
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// owned by core #0 but initialized by core #1
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y: u32,
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}
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#[init(core = 0, late = [x])]
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fn a(_: a::Context) -> a::LateResources {
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a::LateResources { x: 0 }
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}
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#[idle(core = 0, resources = [y])]
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fn b(_: b::Context) -> ! {
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loop {}
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}
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#[init(core = 1)]
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fn c(_: c::Context) -> c::LateResources {
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c::LateResources { y: 0 }
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}
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#[idle(core = 1, resources = [x])]
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fn d(_: d::Context) -> ! {
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loop {}
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}
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};
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@ -1,26 +0,0 @@
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//! [compile-pass] Split initialization of late resources
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#![deny(unsafe_code)]
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#![deny(warnings)]
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#![no_main]
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#![no_std]
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use panic_halt as _;
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#[rtic::app(cores = 2, device = heterogeneous)]
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const APP: () = {
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struct Resources {
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x: u32,
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y: u32,
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}
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#[init(core = 0, late = [x])]
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fn a(_: a::Context) -> a::LateResources {
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a::LateResources { x: 0 }
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}
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#[init(core = 1)]
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fn b(_: b::Context) -> b::LateResources {
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b::LateResources { y: 0 }
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}
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};
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@ -1,36 +0,0 @@
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#![no_main]
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#![no_std]
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use panic_halt as _;
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#[rtic::app(cores = 2, device = heterogeneous, monotonic = heterogeneous::MT)]
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const APP: () = {
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#[init(core = 0, spawn = [ping])]
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fn init(c: init::Context) {
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c.spawn.ping().ok();
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}
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#[task(core = 0, schedule = [ping])]
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fn pong(c: pong::Context) {
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c.schedule.ping(c.scheduled + 1_000_000).ok();
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}
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#[task(core = 1, schedule = [pong])]
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fn ping(c: ping::Context) {
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c.schedule.pong(c.scheduled + 1_000_000).ok();
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}
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extern "C" {
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#[core = 0]
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fn I0();
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#[core = 0]
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fn I1();
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#[core = 1]
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fn I0();
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#[core = 1]
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fn I1();
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}
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};
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@ -1,20 +0,0 @@
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#![no_main]
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#![no_std]
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use panic_halt as _;
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#[rtic::app(cores = 2, device = heterogeneous)]
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const APP: () = {
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#[init(core = 0, spawn = [foo])]
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fn init(c: init::Context) {
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c.spawn.foo().ok();
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}
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#[task(core = 1)]
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fn foo(_: foo::Context) {}
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extern "C" {
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#[core = 1]
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fn I0();
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}
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};
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@ -1,99 +0,0 @@
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//! Fake multi-core PAC
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#![no_std]
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use core::{
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cmp::Ordering,
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ops::{Add, Sub},
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};
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use bare_metal::Nr;
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use rtic::{Fraction, Monotonic, MultiCore};
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// both cores have the exact same interrupts
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pub use Interrupt_0 as Interrupt_1;
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// Fake priority bits
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pub const NVIC_PRIO_BITS: u8 = 3;
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pub fn xpend(_core: u8, _interrupt: impl Nr) {}
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/// Fake monotonic timer
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pub struct MT;
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impl Monotonic for MT {
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type Instant = Instant;
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fn ratio() -> Fraction {
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Fraction {
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numerator: 1,
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denominator: 1,
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}
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}
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unsafe fn reset() {
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(0xE0001004 as *mut u32).write_volatile(0)
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}
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fn now() -> Instant {
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unsafe { Instant((0xE0001004 as *const u32).read_volatile() as i32) }
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}
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fn zero() -> Instant {
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Instant(0)
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}
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}
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impl MultiCore for MT {}
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#[derive(Clone, Copy, Eq, PartialEq)]
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pub struct Instant(i32);
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impl Add<u32> for Instant {
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type Output = Instant;
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fn add(self, rhs: u32) -> Self {
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Instant(self.0.wrapping_add(rhs as i32))
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}
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}
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impl Sub for Instant {
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type Output = u32;
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fn sub(self, rhs: Self) -> u32 {
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self.0.checked_sub(rhs.0).unwrap() as u32
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}
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}
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impl Ord for Instant {
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fn cmp(&self, rhs: &Self) -> Ordering {
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self.0.wrapping_sub(rhs.0).cmp(&0)
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}
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}
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impl PartialOrd for Instant {
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fn partial_cmp(&self, rhs: &Self) -> Option<Ordering> {
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Some(self.cmp(rhs))
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}
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}
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// Fake interrupts
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#[allow(non_camel_case_types)]
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#[derive(Clone, Copy)]
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#[repr(u8)]
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pub enum Interrupt_0 {
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I0 = 0,
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I1 = 1,
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I2 = 2,
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I3 = 3,
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I4 = 4,
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I5 = 5,
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I6 = 6,
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I7 = 7,
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}
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unsafe impl Nr for Interrupt_0 {
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fn nr(&self) -> u8 {
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*self as u8
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}
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}
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@ -1,17 +0,0 @@
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[package]
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authors = ["Jorge Aparicio <jorge@japaric.io>"]
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edition = "2018"
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name = "homogeneous"
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# this crate is only used for testing
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publish = false
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version = "0.0.0-alpha.0"
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[dependencies]
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bare-metal = "0.2.4"
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[dependencies.cortex-m-rtic]
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path = ".."
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features = ["homogeneous"]
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[dev-dependencies]
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panic-halt = "0.2.0"
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@ -1 +0,0 @@
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This directory contains *homogeneous* multi-core compile pass tests.
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@ -1,7 +0,0 @@
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#![no_main]
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#![no_std]
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use panic_halt as _;
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#[rtic::app(cores = 2, device = homogeneous)]
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const APP: () = {};
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@ -1,39 +0,0 @@
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//! [compile-pass] Cross initialization of late resources
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#![deny(unsafe_code)]
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#![deny(warnings)]
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#![no_main]
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#![no_std]
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use panic_halt as _;
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#[rtic::app(cores = 2, device = homogeneous)]
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const APP: () = {
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struct Resources {
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// owned by core #1 but initialized by core #0
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x: u32,
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// owned by core #0 but initialized by core #1
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y: u32,
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}
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#[init(core = 0, late = [x])]
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fn a(_: a::Context) -> a::LateResources {
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a::LateResources { x: 0 }
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}
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#[idle(core = 0, resources = [y])]
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fn b(_: b::Context) -> ! {
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loop {}
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}
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#[init(core = 1)]
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fn c(_: c::Context) -> c::LateResources {
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c::LateResources { y: 0 }
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}
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#[idle(core = 1, resources = [x])]
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fn d(_: d::Context) -> ! {
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loop {}
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}
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};
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@ -1,26 +0,0 @@
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//! [compile-pass] Split initialization of late resources
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#![deny(unsafe_code)]
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#![deny(warnings)]
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#![no_main]
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#![no_std]
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use panic_halt as _;
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#[rtic::app(cores = 2, device = homogeneous)]
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const APP: () = {
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struct Resources {
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x: u32,
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y: u32,
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}
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#[init(core = 0, late = [x])]
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fn a(_: a::Context) -> a::LateResources {
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a::LateResources { x: 0 }
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}
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#[init(core = 1)]
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fn b(_: b::Context) -> b::LateResources {
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b::LateResources { y: 0 }
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}
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};
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@ -1,36 +0,0 @@
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#![no_main]
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#![no_std]
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use panic_halt as _;
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#[rtic::app(cores = 2, device = homogeneous, monotonic = homogeneous::MT)]
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const APP: () = {
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#[init(core = 0, spawn = [ping])]
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fn init(c: init::Context) {
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c.spawn.ping().ok();
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}
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#[task(core = 0, schedule = [ping])]
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fn pong(c: pong::Context) {
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c.schedule.ping(c.scheduled + 1_000_000).ok();
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}
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#[task(core = 1, schedule = [pong])]
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fn ping(c: ping::Context) {
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c.schedule.pong(c.scheduled + 1_000_000).ok();
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}
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extern "C" {
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#[core = 0]
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fn I0();
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#[core = 0]
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fn I1();
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#[core = 1]
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fn I0();
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#[core = 1]
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fn I1();
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}
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};
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@ -1,20 +0,0 @@
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#![no_main]
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#![no_std]
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use panic_halt as _;
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#[rtic::app(cores = 2, device = homogeneous)]
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const APP: () = {
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#[init(core = 0, spawn = [foo])]
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fn init(c: init::Context) {
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c.spawn.foo().ok();
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}
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#[task(core = 1)]
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fn foo(_: foo::Context) {}
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extern "C" {
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#[core = 1]
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fn I0();
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}
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};
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@ -1,99 +0,0 @@
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//! Fake multi-core PAC
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#![no_std]
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use core::{
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cmp::Ordering,
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ops::{Add, Sub},
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};
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use bare_metal::Nr;
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use rtic::{Fraction, Monotonic, MultiCore};
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// both cores have the exact same interrupts
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pub use Interrupt_0 as Interrupt_1;
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// Fake priority bits
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pub const NVIC_PRIO_BITS: u8 = 3;
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pub fn xpend(_core: u8, _interrupt: impl Nr) {}
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/// Fake monotonic timer
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pub struct MT;
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impl Monotonic for MT {
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type Instant = Instant;
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fn ratio() -> Fraction {
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Fraction {
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numerator: 1,
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denominator: 1,
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}
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}
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unsafe fn reset() {
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(0xE0001004 as *mut u32).write_volatile(0)
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}
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fn now() -> Instant {
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unsafe { Instant((0xE0001004 as *const u32).read_volatile() as i32) }
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}
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fn zero() -> Instant {
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Instant(0)
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}
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}
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impl MultiCore for MT {}
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#[derive(Clone, Copy, Eq, PartialEq)]
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pub struct Instant(i32);
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impl Add<u32> for Instant {
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type Output = Instant;
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fn add(self, rhs: u32) -> Self {
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Instant(self.0.wrapping_add(rhs as i32))
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}
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}
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impl Sub for Instant {
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type Output = u32;
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fn sub(self, rhs: Self) -> u32 {
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self.0.checked_sub(rhs.0).unwrap() as u32
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}
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}
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impl Ord for Instant {
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fn cmp(&self, rhs: &Self) -> Ordering {
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self.0.wrapping_sub(rhs.0).cmp(&0)
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}
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}
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impl PartialOrd for Instant {
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fn partial_cmp(&self, rhs: &Self) -> Option<Ordering> {
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Some(self.cmp(rhs))
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}
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}
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// Fake interrupts
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#[allow(non_camel_case_types)]
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#[derive(Clone, Copy)]
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#[repr(u8)]
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pub enum Interrupt_0 {
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I0 = 0,
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I1 = 1,
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I2 = 2,
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I3 = 3,
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I4 = 4,
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I5 = 5,
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I6 = 6,
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I7 = 7,
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}
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unsafe impl Nr for Interrupt_0 {
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fn nr(&self) -> u8 {
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*self as u8
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}
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}
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