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rtic-sync Arbiter: impl more I2C trait fns

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For example embassy-stm32 I2C does not impl transaction yet but other fns are available. So it would be better to impl all of them here.
This commit is contained in:
Andres Vahter 2023-11-28 10:36:39 +02:00 committed by Emil Fresk
parent e8667d7872
commit 9f5820da1d
2 changed files with 22 additions and 2 deletions
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4
rtic-sync/CHANGELOG.md
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@ -9,8 +9,8 @@ For each category, _Added_, _Changed_, _Fixed_ add new entries at the top!
### Added
- `arbiter::spi::ArbiterDevice` for sharing SPI buses using `embedded-hal-async`
- `arbiter::i2c::ArbiterDevice` for sharing I2C buses using `embedded-hal-async`
- `arbiter::spi::ArbiterDevice` for sharing SPI buses using `embedded-hal-async` traits.
- `arbiter::i2c::ArbiterDevice` for sharing I2C buses using `embedded-hal-async` traits.
### Changed

20
rtic-sync/src/arbiter.rs
View file

@ -352,6 +352,26 @@ pub mod i2c {
BUS: I2c<A>,
A: AddressMode,
{
async fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error> {
let mut bus = self.bus.access().await;
bus.read(address, read).await
}
async fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> {
let mut bus = self.bus.access().await;
bus.write(address, write).await
}
async fn write_read(
&mut self,
address: A,
write: &[u8],
read: &mut [u8],
) -> Result<(), Self::Error> {
let mut bus = self.bus.access().await;
bus.write_read(address, write, read).await
}
async fn transaction(
&mut self,
address: A,