Adjust esp32c3 codegen, bump pac to 0.21.0 (#906)

* adjust esp32c3 codegen, bump pac to 0.21.0

* add esp32c3 example

* adjust workflow flags

* CI: Fix esp32c3 comment

* esp32c3: Remove commented out git-dep

* CI: Actually check the ESP32-C3 examples

* Autoformat rtic/cargo.toml

---------

Co-authored-by: Henrik Tjäder <henrik@tjaders.com>
This commit is contained in:
onsdagens 2024-04-04 11:35:41 +02:00 committed by GitHub
parent 53ed7bf7ed
commit 906278e310
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11 changed files with 1028 additions and 17 deletions

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@ -180,6 +180,35 @@ jobs:
if: ${{ matrix.backend != 'riscv32-imc-clint' }} if: ${{ matrix.backend != 'riscv32-imc-clint' }}
run: cargo xtask --platform hifive1 --backend ${{ matrix.backend }} example-check run: cargo xtask --platform hifive1 --backend ${{ matrix.backend }} example-check
# Platform esp32c3: verify all examples, checks
checkexamplesesp32c3:
name: check examples (esp32c3)
runs-on: ubuntu-22.04
strategy:
matrix:
backend:
- riscv-esp32-c3
toolchain:
- nightly
steps:
- name: Checkout
uses: actions/checkout@v4
- name: Install Rust ${{ matrix.toolchain }}
run: |
rustup toolchain install nightly-2023-11-14 --component rust-src --target riscv32imc-unknown-none-elf
- name: Configure Rust target
run: |
rustup target add riscv32imc-unknown-none-elf
- name: Cache Dependencies
uses: Swatinem/rust-cache@v2
- name: Check the examples
run: cargo xtask --platform esp32-c3 --backend ${{ matrix.backend }} example-check
buildqemu: buildqemu:
name: Get modern QEMU, build and store name: Get modern QEMU, build and store
runs-on: ubuntu-22.04 runs-on: ubuntu-22.04
@ -797,6 +826,7 @@ jobs:
# clippyhifive1 TODO # clippyhifive1 TODO
- checkexampleslm3s6965 - checkexampleslm3s6965
- checkexampleshifive1 - checkexampleshifive1
- checkexamplesesp32c3
- testexampleslm3s6965 - testexampleslm3s6965
- testexampleshifive1 - testexampleshifive1
- tests - tests

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@ -0,0 +1,15 @@
[target.riscv32imc-unknown-none-elf]
runner = "espflash flash --monitor"
[build]
rustflags = [
"-C", "link-arg=-Tlinkall.x",
# Required to obtain backtraces (e.g. when using the "esp-backtrace" crate.)
# NOTE: May negatively impact performance of produced code
"-C", "force-frame-pointers",
]
target = "riscv32imc-unknown-none-elf"
[unstable]
build-std = ["core"]

830
examples/esp32c3/Cargo.lock generated Normal file
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"xtensa-lx-rt-proc-macros",
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dependencies = [
"darling",
"proc-macro2",
"quote",
"syn 2.0.53",
]

View file

@ -0,0 +1,24 @@
[package]
name = "esp32-c3"
version = "0.1.0"
edition = "2021"
license = "MIT OR Apache-2.0"
[workspace]
[dependencies]
rtic = {path = "../../rtic/"}
esp-hal = { version = "0.16.1", features = ["esp32c3", "direct-vectoring", "interrupt-preemption"] }
esp-backtrace = { version = "0.11.0", features = [
"esp32c3",
"panic-handler",
"exception-handler",
"println",
] }
esp32c3 = {version = "0.21.0", features = ["critical-section"]}
esp-println = { version = "0.9.0", features = ["esp32c3", "uart"] }
[features]
test-critical-section = []
riscv-esp32c3-backend = ["rtic/riscv-esp32c3-backend"]

View file

@ -0,0 +1,33 @@
### ESP32-C3 RTIC template
This crate showcases a simple RTIC application for the ESP32-C3.
## Prerequisites
# Nightly Rust
The ESP32-C3 HAL requires a nightly build of Rust.
Following the example of the (Espressif no_std book)[https://docs.esp-rs.org/no_std-training/02_2_software.html], we use this specific build:
```rustup toolchain install nightly-2023-11-14 --component rust-src --target riscv32imc-unknown-none-elf```
# Espressif toolchain
This crate uses the most convenient option in ``cargo-espflash`` and ``espflash``
```cargo install cargo-espflash espflash```
## Running the crate
```cargo run --example sw_and_hw --features=riscv-esp32c3-backend (--release)```
should do the trick.
# Expected behavior
The program
- Prints ``init``
- Enters a high prio task
- During the execution of the high prio task, the button should be non-functional
- Pends a low prio task
- Exits the high prio task
- Enters the low prio task
- During the execution of the low prio task, the button should be functional.
- Exits the low prio task
- Prints ``idle``

View file

@ -0,0 +1,66 @@
#![no_main]
#![no_std]
#[rtic::app(device = esp32c3, dispatchers=[FROM_CPU_INTR0, FROM_CPU_INTR1])]
mod app {
use esp_backtrace as _;
use esp_hal::{
gpio::{Event, Gpio9, Input, PullDown, IO},
peripherals::Peripherals,
prelude::*,
};
use esp_println::println;
#[shared]
struct Shared {}
#[local]
struct Local {
button: Gpio9<Input<PullDown>>,
}
// do nothing in init
#[init]
fn init(_: init::Context) -> (Shared, Local) {
println!("init");
let peripherals = Peripherals::take();
let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
let mut button = io.pins.gpio9.into_pull_down_input();
button.listen(Event::FallingEdge);
foo::spawn().unwrap();
(Shared {}, Local { button })
}
#[idle()]
fn idle(_: idle::Context) -> ! {
println!("idle");
loop {}
}
#[task(priority = 5)]
async fn foo(_: foo::Context) {
bar::spawn().unwrap(); //enqueue low prio task
println!("Inside high prio task, press button now!");
let mut x = 0;
while x < 5000000 {
x += 1; //burn cycles
esp_hal::riscv::asm::nop();
}
println!("Leaving high prio task.");
}
#[task(priority = 2)]
async fn bar(_: bar::Context) {
println!("Inside low prio task, press button now!");
let mut x = 0;
while x < 5000000 {
x += 1; //burn cycles
esp_hal::riscv::asm::nop();
}
println!("Leaving low prio task.");
}
#[task(binds=GPIO, local=[button], priority = 3)]
fn gpio_handler(cx: gpio_handler::Context) {
cx.local.button.clear_interrupt();
println!("button");
}
}

View file

@ -0,0 +1,4 @@
[toolchain]
channel = "nightly-2023-11-14"
components = ["rust-src"]
targets = ["riscv32imc-unknown-none-elf"]

View file

@ -176,11 +176,11 @@ mod esp32c3 {
// Check for stack overflow using symbols from `risc-v-rt`. // Check for stack overflow using symbols from `risc-v-rt`.
extern "C" { extern "C" {
pub static _stack_start: u32; pub static _stack_start: u32;
pub static __ebss: u32; pub static _bss_end: u32;
} }
let stack_start = &_stack_start as *const _ as u32; let stack_start = &_stack_start as *const _ as u32;
let ebss = &__ebss as *const _ as u32; let ebss = &_bss_end as *const _ as u32;
if stack_start > ebss { if stack_start > ebss {
// No flip-link usage, check the SP for overflow. // No flip-link usage, check the SP for overflow.
@ -241,8 +241,9 @@ mod esp32c3 {
stmts stmts
} }
}
pub fn extra_modules(_app: &App, _analysis: &SyntaxAnalysis) -> Vec<TokenStream2> { pub fn extra_modules(_app: &App, _analysis: &SyntaxAnalysis) -> Vec<TokenStream2> {
vec![] vec![]
} }
}

View file

@ -10,13 +10,7 @@ categories = ["concurrency", "embedded", "no-std", "asynchronous"]
description = "Real-Time Interrupt-driven Concurrency (RTIC): a concurrency framework for building real-time systems" description = "Real-Time Interrupt-driven Concurrency (RTIC): a concurrency framework for building real-time systems"
documentation = "https://rtic.rs/" documentation = "https://rtic.rs/"
edition = "2021" edition = "2021"
keywords = [ keywords = ["embedded", "async", "runtime", "no-std", "rtos"]
"embedded",
"async",
"runtime",
"no-std",
"rtos",
]
license = "MIT OR Apache-2.0" license = "MIT OR Apache-2.0"
name = "rtic" name = "rtic"
readme = "../README.md" readme = "../README.md"
@ -32,8 +26,8 @@ name = "rtic"
[dependencies] [dependencies]
riscv-slic = { git = "https://github.com/romancardenas/riscv-slic.git", rev = "2a91edb", optional = true } riscv-slic = { git = "https://github.com/romancardenas/riscv-slic.git", rev = "2a91edb", optional = true }
esp32c3 = { version = "0.20.0", optional = true} esp32c3 = { version = "0.21.0", optional = true }
riscv = {version = "0.11.0", optional = true} riscv = { version = "0.11.0", optional = true }
cortex-m = { version = "0.7.0", optional = true } cortex-m = { version = "0.7.0", optional = true }
bare-metal = "1.0.0" bare-metal = "1.0.0"
# portable-atomic = { version = "0.3.19" } # portable-atomic = { version = "0.3.19" }
@ -68,7 +62,14 @@ thumbv8main-backend = ["cortex-m", "rtic-macros/cortex-m-basepri"]
# riscv-clic-backend = ["rtic-macros/riscv-clic"] # riscv-clic-backend = ["rtic-macros/riscv-clic"]
# riscv-ch32-backend = ["rtic-macros/riscv-ch32"] # riscv-ch32-backend = ["rtic-macros/riscv-ch32"]
riscv-esp32c3-backend = ["esp32c3", "riscv", "rtic-macros/riscv-esp32c3"] riscv-esp32c3-backend = ["esp32c3", "riscv", "rtic-macros/riscv-esp32c3"]
riscv-clint-backend = ["riscv", "riscv-slic/clint-backend", "rtic-macros/riscv-slic"] riscv-clint-backend = [
"riscv",
"riscv-slic/clint-backend",
"rtic-macros/riscv-slic",
]
# needed for testing # needed for testing
test-critical-section = ["cortex-m/critical-section-single-core", "rtic-monotonics/systick-100hz"] test-critical-section = [
"cortex-m/critical-section-single-core",
"rtic-monotonics/systick-100hz",
]

View file

@ -166,8 +166,8 @@ impl Backends {
Backends::Thumbv7 => ARMV7M, Backends::Thumbv7 => ARMV7M,
Backends::Thumbv8Base => ARMV8MBASE, Backends::Thumbv8Base => ARMV8MBASE,
Backends::Thumbv8Main => ARMV8MMAIN, Backends::Thumbv8Main => ARMV8MMAIN,
Backends::Riscv32ImcClint => RISCV32IMC, Backends::Riscv32ImcClint | Backends::RiscvEsp32C3 => RISCV32IMC,
Backends::RiscvEsp32C3 | Backends::Riscv32ImacClint => RISCV32IMAC, Backends::Riscv32ImacClint => RISCV32IMAC,
} }
} }
@ -202,6 +202,7 @@ pub enum BuildOrCheck {
#[derive(clap::ValueEnum, Copy, Clone, Default, Debug)] #[derive(clap::ValueEnum, Copy, Clone, Default, Debug)]
pub enum Platforms { pub enum Platforms {
Esp32C3,
Hifive1, Hifive1,
#[default] #[default]
Lm3s6965, Lm3s6965,
@ -215,6 +216,7 @@ pub enum Platforms {
impl Platforms { impl Platforms {
pub fn name(&self) -> String { pub fn name(&self) -> String {
let name = match self { let name = match self {
Platforms::Esp32C3 => "esp32c3",
Platforms::Hifive1 => "hifive1", Platforms::Hifive1 => "hifive1",
Platforms::Lm3s6965 => "lm3s6965", Platforms::Lm3s6965 => "lm3s6965",
Platforms::Nrf52840 => "nrf52840", Platforms::Nrf52840 => "nrf52840",
@ -230,6 +232,7 @@ impl Platforms {
pub fn rust_flags(&self) -> Vec<String> { pub fn rust_flags(&self) -> Vec<String> {
let c = "-C".to_string(); let c = "-C".to_string();
match self { match self {
Platforms::Esp32C3 => vec![c, "link-arg=-Tlinkall.x".to_string()],
Platforms::Hifive1 => vec![c, "link-arg=-Thifive1-link.x".to_string()], Platforms::Hifive1 => vec![c, "link-arg=-Thifive1-link.x".to_string()],
Platforms::Lm3s6965 => vec![c, "link-arg=-Tlink.x".to_string()], Platforms::Lm3s6965 => vec![c, "link-arg=-Tlink.x".to_string()],
Platforms::Nrf52840 => vec![ Platforms::Nrf52840 => vec![
@ -267,6 +270,7 @@ impl Platforms {
/// Get the default backend for the platform /// Get the default backend for the platform
pub fn default_backend(&self) -> Backends { pub fn default_backend(&self) -> Backends {
match self { match self {
Platforms::Esp32C3 => Backends::RiscvEsp32C3,
Platforms::Hifive1 => Backends::Riscv32ImcClint, Platforms::Hifive1 => Backends::Riscv32ImcClint,
Platforms::Lm3s6965 => Backends::Thumbv7, Platforms::Lm3s6965 => Backends::Thumbv7,
Platforms::Nrf52840 => unimplemented!(), Platforms::Nrf52840 => unimplemented!(),
@ -282,6 +286,10 @@ impl Platforms {
/// If the backend is supported, but no special features are needed, return Ok(None). /// If the backend is supported, but no special features are needed, return Ok(None).
pub fn features(&self, backend: &Backends) -> Result<Option<&'static str>, ()> { pub fn features(&self, backend: &Backends) -> Result<Option<&'static str>, ()> {
match self { match self {
Platforms::Esp32C3 => match backend.to_target() {
RISCV32IMC => Ok(None),
_ => Err(()),
},
Platforms::Hifive1 => match backend.to_target() { Platforms::Hifive1 => match backend.to_target() {
RISCV32IMC | RISCV32IMAC => Ok(None), RISCV32IMC | RISCV32IMAC => Ok(None),
_ => Err(()), _ => Err(()),

View file

@ -109,7 +109,6 @@ fn main() -> anyhow::Result<()> {
backend backend
)); ));
} }
let examples_path = format!("./examples/{}/examples", platform.name()); let examples_path = format!("./examples/{}/examples", platform.name());
let examples: Vec<_> = std::fs::read_dir(examples_path)? let examples: Vec<_> = std::fs::read_dir(examples_path)?
.filter_map(|p| p.ok()) .filter_map(|p| p.ok())