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rtic-monotonics: Fix stm32-metapac use
Previously, the stm32 monotonics only compiled for some chip families. For example, stm32g081kb worked, but not stm32f407*. The stm32-metapac does not directly unify peripheral names between the many stm32 families, but provides tools for build scripts to generate code that uses the right names for the selected chip. Use that mechanism instead of targeting a specific family.
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commit
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4 changed files with 194 additions and 36 deletions
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@ -7,6 +7,10 @@ For each category, *Added*, *Changed*, *Fixed* add new entries at the top!
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## Unreleased
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### Fixed
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- Fix STM32 support for other chip families
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## v1.2.0 - 2023-09-19
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### Added
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@ -43,7 +43,12 @@ nrf5340-net-pac = { version = "0.12.2", optional = true }
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nrf9160-pac = { version = "0.12.2", optional = true }
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# STM32
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stm32-metapac = { version = "14.0.0", features = ["metadata"], optional = true }
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stm32-metapac = { version = "14.0.0", optional = true }
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[build-dependencies]
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proc-macro2 = { version = "1.0.36", optional = true }
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quote = { version = "1.0.15", optional = true }
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stm32-metapac = { version = "14.0.0", default-features = false, features = ["metadata"], optional = true }
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[features]
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default = []
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@ -78,6 +83,8 @@ stm32_tim5 = []
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stm32_tim12 = []
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stm32_tim15 = []
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stm32-metapac = ["dep:stm32-metapac", "dep:quote", "dep:proc-macro2"]
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# Maintainers: this `stm32-metapac` feature list is taken from:
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# https://github.com/embassy-rs/embassy/blob/2e6f4237f2410aa18c9866a5a1a5ed1f3bec8a4e/embassy-stm32/Cargo.toml#L143
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# It should be updated if `stm32-metapac` version changes because it might contain new chip definitions.
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@ -1,22 +1,180 @@
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fn main() {
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// feature=["stm32g081kb"] etc.
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let stm32_chip: Vec<_> = std::env::vars()
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#[cfg(feature = "stm32-metapac")]
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stm32();
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println!("cargo:rerun-if-changed=build.rs");
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}
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#[cfg(feature = "stm32-metapac")]
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fn stm32() {
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use std::path::PathBuf;
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use std::{env, fs};
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use proc_macro2::TokenStream;
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use quote::{format_ident, quote};
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use stm32_metapac::metadata::METADATA;
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let chip_name = match env::vars()
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.map(|(a, _)| a)
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.filter(|x| {
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!x.starts_with("CARGO_FEATURE_STM32_METAPAC")
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&& !x.starts_with("CARGO_FEATURE_STM32_TIM")
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&& x.starts_with("CARGO_FEATURE_STM32")
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})
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.collect();
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.get_one()
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{
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Ok(x) => x,
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Err(GetOneError::None) => panic!("No stm32xx Cargo feature enabled"),
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Err(GetOneError::Multiple) => panic!("Multiple stm32xx Cargo features enabled"),
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}
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.strip_prefix("CARGO_FEATURE_")
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.unwrap()
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.to_ascii_lowercase();
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match stm32_chip.len() {
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0 => {
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// Not using stm32.
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// Allows to just use #[cfg(stm32)] if one of the stm32 chips is used.
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println!("cargo:rustc-cfg=stm32");
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for p in METADATA.peripherals {
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if let Some(r) = &p.registers {
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println!("cargo:rustc-cfg={}", r.kind);
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println!("cargo:rustc-cfg={}_{}", r.kind, r.version);
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}
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1 => {
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// Allows to just use #[cfg(stm32)] if one of the stm32 chips is used.
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println!("cargo:rustc-cfg=stm32");
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}
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// ========
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// Generate singletons
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let mut singletons: Vec<String> = Vec::new();
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for p in METADATA.peripherals {
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if !p.name.contains("TIM") {
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continue;
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}
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if let Some(r) = &p.registers {
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match r.kind {
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// Generate singletons per pin, not per port
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"gpio" => {
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println!("{}", p.name);
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let port_letter = p.name.strip_prefix("GPIO").unwrap();
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for pin_num in 0..16 {
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singletons.push(format!("P{}{}", port_letter, pin_num));
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}
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}
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// No singleton for these, the HAL handles them specially.
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"exti" => {}
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// We *shouldn't* have singletons for these, but the HAL currently requires
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// singletons, for using with RccPeripheral to enable/disable clocks to them.
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"rcc" => {
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if r.version.starts_with("h5")
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|| r.version.starts_with("h7")
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|| r.version.starts_with("f4")
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{
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singletons.push("MCO1".to_string());
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singletons.push("MCO2".to_string());
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}
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if r.version.starts_with("l4") {
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singletons.push("MCO".to_string());
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}
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singletons.push(p.name.to_string());
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}
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//"dbgmcu" => {}
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//"syscfg" => {}
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//"dma" => {}
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//"bdma" => {}
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//"dmamux" => {}
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// For other peripherals, one singleton per peri
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_ => singletons.push(p.name.to_string()),
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}
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}
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}
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let mut g = TokenStream::new();
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// ========
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// Generate RccPeripheral impls
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for p in METADATA.peripherals {
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if !singletons.contains(&p.name.to_string()) {
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continue;
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}
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if let Some(rcc) = &p.rcc {
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let en = rcc.enable.as_ref().unwrap();
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let rst = match &rcc.reset {
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Some(rst) => {
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let rst_reg = format_ident!("{}", rst.register.to_ascii_lowercase());
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let set_rst_field = format_ident!("set_{}", rst.field.to_ascii_lowercase());
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quote! {
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stm32_metapac::RCC.#rst_reg().modify(|w| w.#set_rst_field(true));
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stm32_metapac::RCC.#rst_reg().modify(|w| w.#set_rst_field(false));
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}
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}
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None => TokenStream::new(),
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};
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let after_enable = if chip_name.starts_with("stm32f2") {
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// Errata: ES0005 - 2.1.11 Delay after an RCC peripheral clock enabling
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quote! {
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cortex_m::asm::dsb();
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}
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} else {
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TokenStream::new()
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};
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let pname = format_ident!("{}", p.name);
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let en_reg = format_ident!("{}", en.register.to_ascii_lowercase());
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let set_en_field = format_ident!("set_{}", en.field.to_ascii_lowercase());
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g.extend(quote! {
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#[doc(hidden)]
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pub mod #pname {
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pub fn enable() {
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stm32_metapac::RCC.#en_reg().modify(|w| w.#set_en_field(true));
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#after_enable
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}
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pub fn reset() {
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#rst
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}
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}
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});
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}
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}
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// ========
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// Generate NVIC impl
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let prio_bits = METADATA.nvic_priority_bits;
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g.extend(quote! {
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pub const NVIC_PRIO_BITS: u8 = #prio_bits;
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});
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// ========
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// Write generated.rs
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let out_dir = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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let out_file = out_dir.join("_generated.rs").to_string_lossy().to_string();
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fs::write(out_file, g.to_string()).unwrap();
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}
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enum GetOneError {
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None,
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Multiple,
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}
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trait IteratorExt: Iterator {
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fn get_one(self) -> Result<Self::Item, GetOneError>;
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}
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impl<T: Iterator> IteratorExt for T {
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fn get_one(mut self) -> Result<Self::Item, GetOneError> {
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match self.next() {
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None => Err(GetOneError::None),
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Some(res) => match self.next() {
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Some(_) => Err(GetOneError::Multiple),
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None => Ok(res),
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},
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}
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_ => panic!("multiple stm32xx definitions {:?}", stm32_chip),
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}
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}
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@ -37,9 +37,16 @@
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use crate::{Monotonic, TimeoutError, TimerQueue};
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use atomic_polyfill::{AtomicU64, Ordering};
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pub use fugit::{self, ExtU64};
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use pac::metadata::METADATA;
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use stm32_metapac as pac;
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mod _generated {
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#![allow(dead_code)]
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#![allow(unused_imports)]
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#![allow(non_snake_case)]
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include!(concat!(env!("OUT_DIR"), "/_generated.rs"));
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}
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const TIMER_HZ: u32 = 1_000_000;
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#[doc(hidden)]
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}};
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}
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// Creates `enable_timer()` function which enables timer in RCC.
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macro_rules! enable_timer {
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($apbenrX:ident, $set_timXen:ident, $apbrstrX:ident, $set_timXrst:ident) => {
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fn enable_timer() {
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pac::RCC.$apbenrX().modify(|r| r.$set_timXen(true));
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pac::RCC.$apbrstrX().modify(|r| r.$set_timXrst(true));
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pac::RCC.$apbrstrX().modify(|r| r.$set_timXrst(false));
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}
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};
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}
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macro_rules! make_timer {
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($mono_name:ident, $timer:ident, $bits:ident, $overflow:ident, $tq:ident$(, doc: ($($doc:tt)*))?) => {
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/// Monotonic timer queue implementation.
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@ -139,6 +135,11 @@ macro_rules! make_timer {
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static $overflow: AtomicU64 = AtomicU64::new(0);
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static $tq: TimerQueue<$mono_name> = TimerQueue::new();
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fn enable_timer() {
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_generated::$timer::enable();
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_generated::$timer::reset();
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}
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impl $mono_name {
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/// Starts the monotonic timer.
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/// - `tim_clock_hz`: `TIMx` peripheral clock frequency.
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// plus we are not using any external shared resources so we won't impact
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// basepri/source masking based critical sections.
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unsafe {
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crate::set_monotonic_prio(METADATA.nvic_priority_bits.unwrap(), pac::Interrupt::$timer);
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crate::set_monotonic_prio(_generated::NVIC_PRIO_BITS, pac::Interrupt::$timer);
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cortex_m::peripheral::NVIC::unmask(pac::Interrupt::$timer);
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}
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}
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@ -298,32 +299,20 @@ macro_rules! make_timer {
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};
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}
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#[cfg(feature = "stm32_tim2")]
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enable_timer!(apbenr1, set_tim2en, apbrstr1, set_tim2rst);
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#[cfg(feature = "stm32_tim2")]
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make_timer!(Tim2, TIM2, u32, TIMER2_OVERFLOWS, TIMER2_TQ);
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#[cfg(feature = "stm32_tim3")]
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enable_timer!(apbenr1, set_tim3en, apbrstr1, set_tim3rst);
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#[cfg(feature = "stm32_tim3")]
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make_timer!(Tim3, TIM3, u16, TIMER3_OVERFLOWS, TIMER3_TQ);
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#[cfg(feature = "stm32_tim4")]
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enable_timer!(apbenr1, set_tim4en, apbrstr1, set_tim4rst);
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#[cfg(feature = "stm32_tim4")]
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make_timer!(Tim4, TIM4, u16, TIMER4_OVERFLOWS, TIMER4_TQ);
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#[cfg(feature = "stm32_tim5")]
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enable_timer!(apbenr1, set_tim5en, apbrstr1, set_tim5rst);
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#[cfg(feature = "stm32_tim5")]
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make_timer!(Tim5, TIM5, u16, TIMER5_OVERFLOWS, TIMER5_TQ);
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#[cfg(feature = "stm32_tim12")]
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enable_timer!(apb1enr, set_tim12en, apb1rstr, set_tim12rst);
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#[cfg(feature = "stm32_tim12")]
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make_timer!(Tim12, TIM12, u16, TIMER12_OVERFLOWS, TIMER12_TQ);
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#[cfg(feature = "stm32_tim15")]
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enable_timer!(apbenr2, set_tim15en, apbrstr2, set_tim15rst);
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#[cfg(feature = "stm32_tim15")]
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make_timer!(Tim15, TIM15, u16, TIMER15_OVERFLOWS, TIMER15_TQ);
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