mirror/rtic
1
0
Fork 0
mirror of https://github.com/rtic-rs/rtic.git synced 2024-12-25 03:19:34 +01:00
Code Issues Projects Releases Packages Wiki Activity

Merge #506

Browse source 
506: book: Add note to remember to choose target r=AfoHT a=CuriouslyCurious

While following the instructions in the book I ran into a wall. I was getting linker errors and had no idea why. Turns out trying to run `cargo build --example init` on an x86 build target maybe doesn't work too well, so I added a note about it. 😅

I'll leave this as a draft since my Russian isn't fluent enough to add the note there as well. Also, adding a modified version of `.config/cargo.toml` from the embedded example might be a decent idea but wanted to hear from you guys first. :P

Co-authored-by: CuriouslyCurious <thecuriouslycurious@protonmail.com>
This commit is contained in:
bors[bot] 2021-08-02 14:56:06 +00:00 committed by GitHub
commit 6674848111
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
1 changed files with 7 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
book/en/src/by-example/app.md
View file

@ -53,6 +53,12 @@ $ cargo run --example init
{{#include ../../../../ci/expected/init.run}}
```
> **NOTE**: Remember to specify your chosen target device by passing a target
> triple to cargo (e.g `cargo run --example init --target thumbv7m-none-eabi`) or
> configure a device to be used by default when building the examples in `.cargo/config.toml`.
> In this case, we use a Cortex M3 emulated in QEMU so the target is `thumbv7m-none-eabi`.
> See [`Starting a new project`](./new.md) for more info.
## `idle`
A function marked with the `idle` attribute can optionally appear in the
@ -120,7 +126,7 @@ crate. When the `priority` argument is omitted, the priority is assumed to be
`1`. The `idle` task has a non-configurable static priority of `0`, the lowest priority.
> A higher number means a higher priority in RTIC, which is the opposite from what
> Cortex-M does in the NVIC peripheral.
> Cortex-M does in the NVIC peripheral.
> Explicitly, this means that number `10` has a **higher** priority than number `9`.
When several tasks are ready to be executed the one with highest static