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https://github.com/rtic-rs/rtic.git
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Fix STM32 monotonic rollover race condition
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parent
9f0ab21a34
commit
1f76fb063d
1 changed files with 30 additions and 27 deletions
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@ -35,7 +35,7 @@
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//! ```
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use crate::{Monotonic, TimeoutError, TimerQueue};
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use atomic_polyfill::{AtomicU64, Ordering};
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use atomic_polyfill::{compiler_fence, AtomicU64, Ordering};
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pub use fugit::{self, ExtU64};
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use stm32_metapac as pac;
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@ -135,27 +135,28 @@ macro_rules! make_timer {
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static $overflow: AtomicU64 = AtomicU64::new(0);
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static $tq: TimerQueue<$mono_name> = TimerQueue::new();
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fn enable_timer() {
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_generated::$timer::enable();
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_generated::$timer::reset();
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}
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impl $mono_name {
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/// Starts the monotonic timer.
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/// - `tim_clock_hz`: `TIMx` peripheral clock frequency.
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/// - `_interrupt_token`: Required for correct timer interrupt handling.
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/// This method must be called only once.
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pub fn start(tim_clock_hz: u32, _interrupt_token: impl crate::InterruptToken<Self>) {
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enable_timer();
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_generated::$timer::enable();
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_generated::$timer::reset();
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$timer.cr1().modify(|r| r.set_cen(false));
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assert!((tim_clock_hz % TIMER_HZ) == 0, "Unable to find suitable timer prescaler value!");
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let psc = tim_clock_hz / TIMER_HZ - 1;
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$timer.psc().write(|r| r.set_psc(psc as u16));
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// Enable update event interrupt.
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// Enable full-period interrupt.
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$timer.dier().modify(|r| r.set_uie(true));
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// Configure and enable half-period interrupt
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$timer.ccr(2).write(|r| r.set_ccr($bits::MAX - ($bits::MAX >> 1)));
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$timer.dier().modify(|r| r.set_ccie(2, true));
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// Trigger an update event to load the prescaler value to the clock.
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$timer.egr().write(|r| r.set_ug(true));
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@ -185,15 +186,12 @@ macro_rules! make_timer {
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&$tq
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}
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fn is_overflow() -> bool {
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$timer.sr().read().uif()
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}
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/// Delay for some duration of time.
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#[inline]
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pub async fn delay(duration: <Self as Monotonic>::Duration) {
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$tq.delay(duration).await;
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}
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/// Timeout at a specific time.
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pub async fn timeout_at<F: core::future::Future>(
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instant: <Self as rtic_time::Monotonic>::Instant,
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@ -245,28 +243,28 @@ macro_rules! make_timer {
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const ZERO: Self::Instant = Self::Instant::from_ticks(0);
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fn now() -> Self::Instant {
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let cnt = $timer.cnt().read().cnt();
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// Credits to the `time-driver` of `embassy-stm32`.
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// For more info, see the `imxrt` driver.
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fn calc_now(period: u64, counter: $bits) -> u64 {
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(period << ($bits::BITS - 1)) + u64::from(counter ^ (((period & 1) as $bits) << ($bits::BITS - 1)))
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}
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// If the overflow bit is set, we add this to the timer value. It means the `on_interrupt`
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// has not yet happened, and we need to compensate here.
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let ovf: u64 = if Self::is_overflow() {
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$bits::MAX as u64 + 1
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} else {
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0
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};
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// Important: period **must** be read first.
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let period = $overflow.load(Ordering::Relaxed);
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compiler_fence(Ordering::Acquire);
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let counter = $timer.cnt().read().cnt();
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Self::Instant::from_ticks(cnt as u64 + ovf + $overflow.load(Ordering::SeqCst))
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Self::Instant::from_ticks(calc_now(period, counter))
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}
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fn set_compare(instant: Self::Instant) {
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let now = Self::now();
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let max_ticks = $bits::MAX as u64;
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// Since the timer may or may not overflow based on the requested compare val, we check how many ticks are left.
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let val = match instant.checked_duration_since(now) {
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None => 0, // In the past
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Some(x) if x.ticks() <= max_ticks => instant.duration_since_epoch().ticks() as $bits, // Will not overflow
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Some(_x) => $timer.cnt().read().cnt().wrapping_add($bits::MAX - 1), // Will overflow
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Some(x) if x.ticks() <= ($bits::MAX as u64) => instant.duration_since_epoch().ticks() as $bits, // Will not overflow
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Some(_x) => 0, // Will overflow
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};
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$timer.ccr(1).write(|r| r.set_ccr(val));
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@ -289,10 +287,15 @@ macro_rules! make_timer {
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}
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fn on_interrupt() {
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if Self::is_overflow() {
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// Full period
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if $timer.sr().read().uif() {
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$timer.sr().modify(|r| r.set_uif(false));
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$overflow.fetch_add($bits::MAX as u64 + 1, Ordering::SeqCst);
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$overflow.fetch_add(1, Ordering::Relaxed);
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}
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// Half period
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if $timer.sr().read().ccif(2) {
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$timer.sr().modify(|r| r.set_ccif(2, false));
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$overflow.fetch_add(1, Ordering::Relaxed);
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}
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}
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}
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