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Apply clippy fixes

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This commit is contained in:
Eli Hastings 2025-03-24 09:38:05 +00:00 • committed by Henrik Tjäder
parent 0615841cb8
commit 104ee94dd1
2 changed files with 4 additions and 4 deletions
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5
rtic-macros/src/codegen/bindings/esp32c6.rs
View file

@ -2,6 +2,7 @@
pub use esp32c6::*; pub use esp32c6::*;
#[cfg(feature = "riscv-esp32c6")] #[cfg(feature = "riscv-esp32c6")]
#[allow(clippy::module_inception)]
mod esp32c6 { mod esp32c6 {
use crate::{ use crate::{
analyze::Analysis as CodegenAnalysis, analyze::Analysis as CodegenAnalysis,
@ -97,7 +98,7 @@ mod esp32c6 {
.chain( .chain(
app.hardware_tasks app.hardware_tasks
.values() .values()
.filter_map(|task| Some((&task.args.priority, &task.args.binds))), .map(|task| (&task.args.priority, &task.args.binds)),
) )
.zip(EXTERNAL_INTERRUPTS) .zip(EXTERNAL_INTERRUPTS)
{ {
@ -238,7 +239,7 @@ mod esp32c6 {
.chain( .chain(
app.hardware_tasks app.hardware_tasks
.values() .values()
.filter_map(|task| Some((&task.args.priority, &task.args.binds))), .map(|task| (&task.args.priority, &task.args.binds)),
) )
.zip(EXTERNAL_INTERRUPTS) .zip(EXTERNAL_INTERRUPTS)
{ {

3
rtic/src/export/riscv_esp32c6.rs
View file

@ -58,8 +58,7 @@ where
pub unsafe fn lock<T, R>(ptr: *mut T, ceiling: u8, f: impl FnOnce(&mut T) -> R) -> R { pub unsafe fn lock<T, R>(ptr: *mut T, ceiling: u8, f: impl FnOnce(&mut T) -> R) -> R {
if ceiling == (15) { if ceiling == (15) {
// Turn off interrupts completely, we're at max prio // Turn off interrupts completely, we're at max prio
let r = critical_section::with(|_| f(&mut *ptr)); critical_section::with(|_| f(&mut *ptr))
r
} else { } else {
let current = unsafe { let current = unsafe {
(*PLIC_MX::ptr()) (*PLIC_MX::ptr())