rtic/2/api/search.desc/rp2040_pac/rp2040_pac-desc-0-.js

1 line
132 KiB
JavaScript
Raw Normal View History

searchState.loadedDescShard("rp2040_pac", 0, "Peripheral access API for RP2040 microcontrollers \nControl and data interface to SAR ADC\nADC\n22 - ADC_IRQ_FIFO\nRegister block for busfabric control signals and \nBUSCTRL\nCache and branch predictor maintenance operations\nCache and branch predictor maintenance operations. Not \nCLOCKS\nCLOCKS\n17 - CLOCKS_IRQ\nCPUID\nCPUID\nCore peripherals\nDebug Control Block\nDebug Control Block\nDMA with separate read and write masters\nDMA\n11 - DMA_IRQ_0\n12 - DMA_IRQ_1\nData Watchpoint and Trace unit\nData Watchpoint and Trace unit\nFlash Patch and Breakpoint unit\nFlash Patch and Breakpoint unit. Not available on Armv6-M.\nFloating Point Unit.\nDW_apb_i2c address block\nI2C0\n23 - I2C0_IRQ\nDW_apb_i2c address block\nI2C1\n24 - I2C1_IRQ\nImplementation Control Block.\nIO_BANK0\nIO_BANK0\n13 - IO_IRQ_BANK0\n14 - IO_IRQ_QSPI\nIO_QSPI\nIO_QSPI\nInstrumentation Trace Macrocell\nInstrumentation Trace Macrocell. Not available on Armv6-M \nEnumeration of all the interrupts.\nMemory Protection Unit\nMemory Protection Unit\nNested Vector Interrupt Controller\nNested Vector Interrupt Controller\nNumber available in the NVIC for configuring priority\nPADS_BANK0\nPADS_BANK0\nPADS_QSPI\nPADS_QSPI\nProgrammable IO block\nPIO0\n7 - PIO0_IRQ_0\n8 - PIO0_IRQ_1\nProgrammable IO block\nPIO1\n9 - PIO1_IRQ_0\n10 - PIO1_IRQ_1\nPLL_SYS\nPLL_SYS\nPLL_USB\nPLL_USB\nPPB\nPPB\nPSM\nPSM\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nSimple PWM\nPWM\n4 - PWM_IRQ_WRAP\nAll the peripherals.\nRESETS\nRESETS\nROSC\nROSC\nRegister block to control RTC\nRTC\n25 - RTC_IRQ\nSecurity Attribution Unit\nSystem Control Block\nSystem Control Block\nSingle-cycle IO block Provides core-local and inter-core \nSIO\n15 - SIO_IRQ_PROC0\n16 - SIO_IRQ_PROC1\nSPI0\nSPI0\n18 - SPI0_IRQ\nSPI1\nSPI1\n19 - SPI1_IRQ\n26 - Software IRQ 0\n27 - Software IRQ 1\n28 - Software IRQ 2\n29 - Software IRQ 3\n30 - Software IRQ 4\n31 - Software IRQ 5\nRegister block for various chip control signals\nSYSCFG\nSYSINFO\nSYSINFO\nSysTick: System Timer\nSysTick: System Timer\nTestbench manager. Allows the programmer to know what \nTBMAN\nControls time and alarms time is a 64 bit value indicating \nTIMER\n0 - TIMER_IRQ_0\n1 - TIMER_IRQ_1\n2 - TIMER_IRQ_2\n3 - TIMER_IRQ_3\nTrace Port Interface Unit\nTrace Port Interface Unit. Not available on Armv6-M.\nUART0\nUART0\n20 - UART0_IRQ\nUART1\nUART1\n21 - UART1_IRQ\nDPRAM layout for USB device.\nUSBCTRL_DPRAM\n5 - USBCTRL_IRQ\nUSB FS/LS controller device registers\nUSBCTRL_REGS\ncontrol and status for on-chip voltage regulator and chip \nVREG_AND_CHIP_RESET\nWATCHDOG\nWATCHDOG\nQSPI flash execute-in-pl