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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="Miscellaneous Register 0"><title>imxrt_ral::pmu::MISC0_CLR - Rust</title><script>if(window.location.protocol!=="file:")document.head.insertAdjacentHTML("beforeend","SourceSerif4-Regular-46f98efaafac5295.ttf.woff2,FiraSans-Regular-018c141bf0843ffd.woff2,FiraSans-Medium-8f9a781e4970d388.woff2,SourceCodePro-Regular-562dcc5011b6de7d.ttf.woff2,SourceCodePro-Semibold-d899c5a5c4aeb14a.ttf.woff2".split(",").map(f=>`<link rel="preload" as="font" type="font/woff2" crossorigin href="../../../static.files/${f}">`).join(""))</script><link rel="stylesheet" href="../../../static.files/normalize-76eba96aa4d2e634.css"><link rel="stylesheet" href="../../../static.files/rustdoc-b0742ba02757f159.css"><meta name="rustdoc-vars" data-root-path="../../../" data-static-root-path="../../../static.files/" data-current-crate="imxrt_ral" data-themes="" data-resource-suffix="" data-rustdoc-version="1.83.0 (90b35a623 2024-11-26)" data-channel="1.83.0" data-search-js="search-f0d225181b97f9a4.js" data-settings-js="settings-805db61a62df4bd2.js" ><script src="../../../static.files/storage-1d39b6787ed640ff.js"></script><script defer src="../sidebar-items.js"></script><script defer src="../../../static.files/main-f070b9041d14864c.js"></script><noscript><link rel="stylesheet" href="../../../static.files/noscript-0111fcff984fae8f.css"></noscript><link rel="alternate icon" type="image/png" href="../../../static.files/favicon-32x32-422f7d1d52889060.png"><link rel="icon" type="image/svg+xml" href="../../../static.files/favicon-2c020d218678b618.svg"></head><body class="rustdoc mod"><!--[if lte IE 11]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="mobile-topbar"><button class="sidebar-menu-toggle" title="show sidebar"></button></nav><nav class="sidebar"><div class="sidebar-crate"><h2><a href="../../../imxrt_ral/index.html">imxrt_<wbr>ral</a><span class="version">0.5.3</span></h2></div><div class="sidebar-elems"><section id="rustdoc-toc"><h2 class="location"><a href="#">Module MISC0_<wbr>CLR</a></h2><h3><a href="#modules">Module Items</a></h3><ul class="block"><li><a href="#modules" title="Modules">Modules</a></li></ul></section><div id="rustdoc-modnav"><h2><a href="../index.html">In imxrt_<wbr>ral::<wbr>pmu</a></h2></div></div></nav><div class="sidebar-resizer"></div><main><div class="width-limiter"><rustdoc-search></rustdoc-search><section id="main-content" class="content"><div class="main-heading"><span class="rustdoc-breadcrumbs"><a href="../../index.html">imxrt_ral</a>::<wbr><a href="../index.html">pmu</a></span><h1>Module <span>MISC0_CLR</span><button id="copy-path" title="Copy item path to clipboard">Copy item path</button></h1><rustdoc-toolbar></rustdoc-toolbar><span class="sub-heading"><a class="src" href="../../../src/imxrt_ral/blocks/imxrt1011/pmu.rs.html#2349">source</a> </span></div><details class="toggle top-doc" open><summary class="hideme"><span>Expand description</span></summary><div class="docblock"><p>Miscellaneous Register 0</p>
</div></details><h2 id="modules" class="section-header">Modules<a href="#modules" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="mod" href="CLKGATE_CTRL/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::CLKGATE_CTRL">CLKGATE_<wbr>CTRL</a></div><div class="desc docblock-short">This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block</div></li><li><div class="item-name"><a class="mod" href="CLKGATE_DELAY/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::CLKGATE_DELAY">CLKGATE_<wbr>DELAY</a></div><div class="desc docblock-short">This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block</div></li><li><div class="item-name"><a class="mod" href="DISCON_HIGH_SNVS/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::DISCON_HIGH_SNVS">DISCON_<wbr>HIGH_<wbr>SNVS</a></div><div class="desc docblock-short">This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.</div></li><li><div class="item-name"><a class="mod" href="OSC_I/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::OSC_I">OSC_I</a></div><div class="desc docblock-short">This field determines the bias current in the 24MHz oscillator</div></li><li><div class="item-name"><a class="mod" href="OSC_XTALOK/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::OSC_XTALOK">OSC_<wbr>XTALOK</a></div><div class="desc docblock-short">Status bit that signals that the output of the 24-MHz crystal oscillator is stable</div></li><li><div class="item-name"><a class="mod" href="OSC_XTALOK_EN/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::OSC_XTALOK_EN">OSC_<wbr>XTALOK_<wbr>EN</a></div><div class="desc docblock-short">This bit enables the detector that signals when the 24MHz crystal oscillator is stable</div></li><li><div class="item-name"><a class="mod" href="REFTOP_LOWPOWER/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::REFTOP_LOWPOWER">REFTOP_<wbr>LOWPOWER</a></div><div class="desc docblock-short">Control bit to enable the low-power mode in the analog bandgap.</div></li><li><div class="item-name"><a class="mod" href="REFTOP_PWD/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::REFTOP_PWD">REFTOP_<wbr>PWD</a></div><div class="desc docblock-short">Control bit to power-down the analog bandgap reference circuitry</div></li><li><div class="item-name"><a class="mod" href="REFTOP_PWDVBGUP/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::REFTOP_PWDVBGUP">REFTOP_<wbr>PWDVBGUP</a></div><div class="desc docblock-short">Control bit to power down the VBG-up detection circuitry in the analog bandgap.</div></li><li><div class="item-name"><a class="mod" href="REFTOP_SELFBIASOFF/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::REFTOP_SELFBIASOFF">REFTOP_<wbr>SELFBIASOFF</a></div><div class="desc docblock-short">Control bit to disable the self-bias circuit in the analog bandgap</div></li><li><div class="item-name"><a class="mod" href="REFTOP_VBGADJ/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::REFTOP_VBGADJ">REFTOP_<wbr>VBGADJ</a></div><div class="desc docblock-short">no description available</div></li><li><div class="item-name"><a class="mod" href="REFTOP_VBGUP/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::REFTOP_VBGUP">REFTOP_<wbr>VBGUP</a></div><div class="desc docblock-short">Status bit that signals the analog bandgap voltage is up and stable. 1 - Stable.</div></li><li><div class="item-name"><a class="mod" href="RTC_XTAL_SOURCE/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::RTC_XTAL_SOURCE">RTC_<wbr>XTAL_<wbr>SOURCE</a></div><div class="desc docblock-short">This field indicates which chip source is being used for the rtc clock.</div></li><li><div class="item-name"><a class="mod" href="STOP_MODE_CONFIG/index.html" title="mod imxrt_ral::pmu::MISC0_CLR::STOP_MODE_CONFIG">STOP_<wbr>MODE_<wbr>CONFIG</a></div><div class="desc docblock-short">Configure the analog behavior in stop mode.</div></li><li><div class="item-name"><a class="mod" href="XTAL_24M_PWD/index.html" title="mod imxrt_ral::pmu::MISC0_CLR
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