rtic/src/lib.rs

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//! Real Time For the Masses (RTFM) framework for ARM Cortex-M microcontrollers
//!
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//! **HEADS UP** This is an **beta** pre-release; there may be breaking changes in the API and
//! semantics before a proper release is made.
//!
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//! **IMPORTANT**: This crate is published as [`cortex-m-rtfm`] on crates.io but the name of the
//! library is `rtfm`.
//!
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//! [`cortex-m-rtfm`]: https://crates.io/crates/cortex-m-rtfm
//!
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//! The user level documentation can be found [here].
//!
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//! [here]: https://rtfm.rs
//!
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//! Don't forget to check the documentation of the `#[app]` attribute (listed under the reexports
//! section), which is the main component of the framework.
//!
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//! # Minimum Supported Rust Version (MSRV)
//!
//! This crate is guaranteed to compile on stable Rust 1.36 (2018 edition) and up. It *might*
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//! compile on older versions but that may change in any new patch release.
//!
//! # Semantic Versioning
//!
//! Like the Rust project, this crate adheres to [SemVer]: breaking changes in the API and semantics
//! require a *semver bump* (a new minor version release), with the exception of breaking changes
//! that fix soundness issues -- those are considered bug fixes and can be landed in a new patch
//! release.
//!
//! [SemVer]: https://semver.org/spec/v2.0.0.html
//!
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//! # Cargo features
//!
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//! - `heterogeneous`. This opt-in feature enables the *experimental* heterogeneous multi-core
//! support. This feature depends on unstable feature and requires the use of the nightly channel.
//!
//! - `homogeneous`. This opt-in feature enables the *experimental* homogeneous multi-core support.
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#![deny(missing_docs)]
#![deny(rust_2018_compatibility)]
#![deny(rust_2018_idioms)]
#![deny(warnings)]
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#![no_std]
use core::ops::Sub;
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use cortex_m::{
interrupt::Nr,
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peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, TPIU},
};
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#[cfg(all(not(feature = "heterogeneous"), not(feature = "homogeneous")))]
use cortex_m_rt as _; // vector table
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pub use cortex_m_rtfm_macros::app;
pub use rtfm_core::{Exclusive, Mutex};
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#[cfg(armv7m)]
pub mod cyccnt;
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#[doc(hidden)]
pub mod export;
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#[doc(hidden)]
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mod tq;
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/// `cortex_m::Peripherals` minus `SYST`
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#[allow(non_snake_case)]
pub struct Peripherals {
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/// Cache and branch predictor maintenance operations (not present on Cortex-M0 variants)
pub CBP: CBP,
/// CPUID
pub CPUID: CPUID,
/// Debug Control Block
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pub DCB: DCB,
/// Data Watchpoint and Trace unit
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pub DWT: DWT,
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/// Flash Patch and Breakpoint unit (not present on Cortex-M0 variants)
pub FPB: FPB,
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/// Floating Point Unit (only present on `thumbv7em-none-eabihf`)
pub FPU: FPU,
/// Instrumentation Trace Macrocell (not present on Cortex-M0 variants)
pub ITM: ITM,
/// Memory Protection Unit
pub MPU: MPU,
/// Nested Vector Interrupt Controller
pub NVIC: NVIC,
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/// System Control Block
pub SCB: SCB,
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// SysTick: System Timer
// pub SYST: SYST,
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/// Trace Port Interface Unit (not present on Cortex-M0 variants)
pub TPIU: TPIU,
}
impl From<cortex_m::Peripherals> for Peripherals {
fn from(p: cortex_m::Peripherals) -> Self {
Self {
CBP: p.CBP,
CPUID: p.CPUID,
DCB: p.DCB,
DWT: p.DWT,
FPB: p.FPB,
FPU: p.FPU,
ITM: p.ITM,
MPU: p.MPU,
NVIC: p.NVIC,
SCB: p.SCB,
TPIU: p.TPIU,
}
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}
}
/// A fraction
pub struct Fraction {
/// The numerator
pub numerator: u32,
/// The denominator
pub denominator: u32,
}
/// A monotonic clock / counter
pub trait Monotonic {
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/// A measurement of this clock, use `CYCCNT` as a reference implementation for `Instant`.
/// Note that the Instant must be a signed value such as `i32`.
type Instant: Copy + Ord + Sub;
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/// The ratio between the system timer (SysTick) frequency and this clock frequency, i.e.
/// `Monotonic clock * Fraction = System clock`
///
/// The ratio must be expressed in *reduced* `Fraction` form to prevent overflows. That is
/// `2 / 3` instead of `4 / 6`
fn ratio() -> Fraction;
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/// Returns the current time
///
/// # Correctness
///
/// This function is *allowed* to return nonsensical values if called before `reset` is invoked
/// by the runtime. Therefore application authors should *not* call this function during the
/// `#[init]` phase.
fn now() -> Self::Instant;
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/// Resets the counter to *zero*
///
/// # Safety
///
/// This function will be called *exactly once* by the RTFM runtime after `#[init]` returns and
/// before tasks can start; this is also the case in multi-core applications. User code must
/// *never* call this function.
unsafe fn reset();
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/// A `Self::Instant` that represents a count of *zero*
fn zero() -> Self::Instant;
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}
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/// A marker trait that indicates that it is correct to use this type in multi-core context
pub trait MultiCore {}
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/// Sets the given `interrupt` as pending
///
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/// This is a convenience function around
/// [`NVIC::pend`](../cortex_m/peripheral/struct.NVIC.html#method.pend)
pub fn pend<I>(interrupt: I)
where
I: Nr,
{
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NVIC::pend(interrupt)
}