rtic/.gdbinit

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2017-07-29 07:34:00 +02:00
target remote :3333
monitor arm semihosting enable
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# # send captured ITM to the file itm.fifo
# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
# # 8000000 must match the core clock frequency
# monitor tpiu config internal itm.fifo uart off 8000000
# OR: make the microcontroller SWO pin output compatible with UART (8N1)
# 2000000 is the frequency of the SWO pin
monitor tpiu config external uart off 8000000 2000000
# enable ITM port 0
monitor itm port 0 on
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load
step