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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="Flag Register, UARTFR"><title>rp2040_pac::uart0::uartfr - Rust</title><script>if(window.location.protocol!=="file:")document.head.insertAdjacentHTML("beforeend","SourceSerif4-Regular-46f98efaafac5295.ttf.woff2,FiraSans-Regular-018c141bf0843ffd.woff2,FiraSans-Medium-8f9a781e4970d388.woff2,SourceCodePro-Regular-562dcc5011b6de7d.ttf.woff2,SourceCodePro-Semibold-d899c5a5c4aeb14a.ttf.woff2".split(",").map(f=>`<link rel="preload" as="font" type="font/woff2" crossorigin href="../../../static.files/${f}">`).join(""))</script><link rel="stylesheet" href="../../../static.files/normalize-76eba96aa4d2e634.css"><link rel="stylesheet" href="../../../static.files/rustdoc-b0742ba02757f159.css"><meta name="rustdoc-vars" data-root-path="../../../" data-static-root-path="../../../static.files/" data-current-crate="rp2040_pac" data-themes="" data-resource-suffix="" data-rustdoc-version="1.83.0 (90b35a623 2024-11-26)" data-channel="1.83.0" data-search-js="search-f0d225181b97f9a4.js" data-settings-js="settings-805db61a62df4bd2.js" ><script src="../../../static.files/storage-1d39b6787ed640ff.js"></script><script defer src="../sidebar-items.js"></script><script defer src="../../../static.files/main-f070b9041d14864c.js"></script><noscript><link rel="stylesheet" href="../../../static.files/noscript-0111fcff984fae8f.css"></noscript><link rel="alternate icon" type="image/png" href="../../../static.files/favicon-32x32-422f7d1d52889060.png"><link rel="icon" type="image/svg+xml" href="../../../static.files/favicon-2c020d218678b618.svg"></head><body class="rustdoc mod"><!--[if lte IE 11]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="mobile-topbar"><button class="sidebar-menu-toggle" title="show sidebar"></button></nav><nav class="sidebar"><div class="sidebar-crate"><h2><a href="../../../rp2040_pac/index.html">rp2040_<wbr>pac</a><span class="version">0.6.0</span></h2></div><div class="sidebar-elems"><section id="rustdoc-toc"><h2 class="location"><a href="#">Module uartfr</a></h2><h3><a href="#structs">Module Items</a></h3><ul class="block"><li><a href="#structs" title="Structs">Structs</a></li><li><a href="#types" title="Type Aliases">Type Aliases</a></li></ul></section><div id="rustdoc-modnav"><h2><a href="../index.html">In rp2040_<wbr>pac::<wbr>uart0</a></h2></div></div></nav><div class="sidebar-resizer"></div><main><div class="width-limiter"><rustdoc-search></rustdoc-search><section id="main-content" class="content"><div class="main-heading"><span class="rustdoc-breadcrumbs"><a href="../../index.html">rp2040_pac</a>::<wbr><a href="../index.html">uart0</a></span><h1>Module <span>uartfr</span><button id="copy-path" title="Copy item path to clipboard">Copy item path</button></h1><rustdoc-toolbar></rustdoc-toolbar><span class="sub-heading"><a class="src" href="../../../src/rp2040_pac/uart0/uartfr.rs.html#1-80">source</a> </span></div><details class="toggle top-doc" open><summary class="hideme"><span>Expand description</span></summary><div class="docblock"><p>Flag Register, UARTFR</p>
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</div></details><h2 id="structs" class="section-header">Structs<a href="#structs" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="struct" href="struct.UARTFR_SPEC.html" title="struct rp2040_pac::uart0::uartfr::UARTFR_SPEC">UARTFR_<wbr>SPEC</a></div><div class="desc docblock-short">Flag Register, UARTFR</div></li></ul><h2 id="types" class="section-header">Type Aliases<a href="#types" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="type" href="type.BUSY_R.html" title="type rp2040_pac::uart0::uartfr::BUSY_R">BUSY_R</a></div><div class="desc docblock-short">Field <code>BUSY</code> reader - UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains set until the complete byte, including all the stop bits, has been sent from the shift register. This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether the UART is enabled or not.</div></li><li><div class="item-name"><a class="type" href="type.CTS_R.html" title="type rp2040_pac::uart0::uartfr::CTS_R">CTS_R</a></div><div class="desc docblock-short">Field <code>CTS</code> reader - Clear to send. This bit is the complement of the UART clear to send, nUARTCTS, modem status input. That is, the bit is 1 when nUARTCTS is LOW.</div></li><li><div class="item-name"><a class="type" href="type.DCD_R.html" title="type rp2040_pac::uart0::uartfr::DCD_R">DCD_R</a></div><div class="desc docblock-short">Field <code>DCD</code> reader - Data carrier detect. This bit is the complement of the UART data carrier detect, nUARTDCD, modem status input. That is, the bit is 1 when nUARTDCD is LOW.</div></li><li><div class="item-name"><a class="type" href="type.DSR_R.html" title="type rp2040_pac::uart0::uartfr::DSR_R">DSR_R</a></div><div class="desc docblock-short">Field <code>DSR</code> reader - Data set ready. This bit is the complement of the UART data set ready, nUARTDSR, modem status input. That is, the bit is 1 when nUARTDSR is LOW.</div></li><li><div class="item-name"><a class="type" href="type.R.html" title="type rp2040_pac::uart0::uartfr::R">R</a></div><div class="desc docblock-short">Register <code>UARTFR</code> reader</div></li><li><div class="item-name"><a class="type" href="type.RI_R.html" title="type rp2040_pac::uart0::uartfr::RI_R">RI_R</a></div><div class="desc docblock-short">Field <code>RI</code> reader - Ring indicator. This bit is the complement of the UART ring indicator, nUARTRI, modem status input. That is, the bit is 1 when nUARTRI is LOW.</div></li><li><div class="item-name"><a class="type" href="type.RXFE_R.html" title="type rp2040_pac::uart0::uartfr::RXFE_R">RXFE_R</a></div><div class="desc docblock-short">Field <code>RXFE</code> reader - Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the UARTLCR_H Register. If the FIFO is disabled, this bit is set when the receive holding register is empty. If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.</div></li><li><div class="item-name"><a class="type" href="type.RXFF_R.html" title="type rp2040_pac::uart0::uartfr::RXFF_R">RXFF_R</a></div><div class="desc docblock-short">Field <code>RXFF</code> reader - Receive FIFO full. The meaning of this bit depends on the state of the FEN bit in the UARTLCR_H Register. If the FIFO is disabled, this bit is set when the receive holding register is full. If the FIFO is enabled, the RXFF bit is set when the receive FIFO is full.</div></li><li><div class="item-name"><a class="type" href="type.TXFE_R.html" title="type rp2040_pac::uart0::uartfr::TXFE_R">TXFE_R</a></div><div class="desc docblock-short">Field <code>TXFE</code> reader - Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the Line Control Register, UARTLCR_H. If the FIFO is disabled, this bit is set when the transmit holding register is empty. If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does not indicate if there is data in the transmit shift register.</div></li><li><div class="item
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