imxrt_ral::flexspi

# Module MCR1

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Module Control Register 1

## Modules§

- AHBBUSWAIT
  AHB Read/Write access to Serial Flash Memory space will timeout if not data received from Flash or data not transmitted after AHBBUSWAIT * 1024 ahb clock cycles, AHB Bus will get an error response
- SEQWAIT
  Command Sequence Execution will timeout and abort after SEQWAIT * 1024 Serial Root Clock cycles